On Sat, Feb 6, 2016, 6:06 AM <[email protected]> wrote:

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>    - Static branch prediction (was: On intel x86 processors do you have
>    branch predictions on fixed loops ?)
>    <#m_4640073617864472708_group_thread_0> - 1 Update
>
> Static branch prediction (was: On intel x86 processors do you have branch
> predictions on fixed loops ?)
> <http://groups.google.com/group/mechanical-sympathy/t/a4c37a4db5f03947?utm_source=digest&utm_medium=email>
> Matt Godbolt <[email protected]>: Feb 05 02:58PM
>
> Hi Matt,
>
> A quick reply: thanks again for the link! My reading list is significantly
> backed up now :)
>
> For now I'm going to concentrate on honing my technique and scripts on the
> Arrendale - mainly as it's a computer I have available even when I'm
> commuting (which is where I get most of the time for this!). Once I'm
> comfortable explaining branch prediction there, I'll move on to the Sandy,
> Ivy and Haswell: each of which has significant BP improvements.
>
> I'm also first starting on interpreting the BTB size - under the assumption
> that there's no taken/not-taken information stored there; and that a miss
> in the BTB always causes one of the "BP failure" counters to tick up. At
> least on Arrendale/Westmere, there's a bunch of counters for this; early
> ones where the decoder spots a branch the BTB failed to notice, for
> example. I have a ton of notes and thoughts; I'll probably write up
> something over the next few days and post it here (or a link to a blog post
> or similar).
>
> Thanks, Matt (G) :)
>
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