Hi, I'm reading the following book "Developing High-Frequency Trading Systems". My goal is not to write any high-frequency trading systems, but to get some insights into the domain and learn as much as possible from the applied techniques. It is a Packt book and they are not known for their quality. But it is written by 3 engineers with a combined HFT experience of almost 50 years.
On page 62 of the book, they make the following claim. If you are using a hyper-threading and there is an interrupt or a system call on one logical core, then the hyper-sibling will stall as well because both need access to the kernel (mode switch). I don't believe this is correct. Each logical core has its own architectural state; so its own set of architectural registers and its own APIC including an interrupt descriptor table. The current privilege level is stored in the first 2 bits of the CS register and since every logical core has its own copy of that, the hyper siblings should be able to run independently no matter if there is a mode switch. Of course, disabling hyper-threading will lead to improved performance of a single core, because it doesn't need to share any resources like rob, line fill buffers, store buffers, load buffets, execution units, reservation stations, caches, etc. So that is a valid reason to disable hyper-threading. I'm by no means an X86 expert and certainly not a high-frequency trading expert. So perhaps I'm missing something. Regards, Peter. -- You received this message because you are subscribed to the Google Groups "mechanical-sympathy" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. To view this discussion on the web, visit https://groups.google.com/d/msgid/mechanical-sympathy/CAGuAWdChA2kzo1RXHUB3Zh1H5GonVs82BhkCzG7ap4Q1PaUvdg%40mail.gmail.com.
