SCU FW updates a SRAM location with Open Circuit Voltage(OCV) value. This address is mapped by the driver to get OCV. Once after reading the OCV we will find out the Corresponding charge value and send this charge value to SCU FW using IPC command so that the Coulomb counter in the SCU will get updated properly.
As part of this patch we added new SRAM address in the driver and added support for map/unmap the memory in the probe/remove functions. Also added a function to get the OCV and send the charge value through IPC call. msic_power_module_info structure's variable msic_regs_iomap is changed to msic_intr_iomap and new variable msic_ocv_iomap is added to support OCV. Also uevent notification call is added in msic status monitoring function to notify the user space after every monitoring cycle. Along with these two more global variables are added to hold the SRAM locations. With this patch we are hard coding two different addresses in the driver. Hard coding will be removed once We get the support from FW through SFI/IPC or through PCI bar. Signed-off-by: Ramakrishna Pallala <ramakrishna.pall...@intel.com> --- drivers/power/intel_mdf_battery.c | 71 ++++++++++++++++++++++++++++++------ 1 files changed, 59 insertions(+), 12 deletions(-) diff --git a/drivers/power/intel_mdf_battery.c b/drivers/power/intel_mdf_battery.c index dcc8b1b..7758415 100644 --- a/drivers/power/intel_mdf_battery.c +++ b/drivers/power/intel_mdf_battery.c @@ -372,11 +372,17 @@ struct msic_batt_sfi_prop { unsigned short int term_cur; char temp_mon_ranges; struct temperature_monitoring_range temp_mon_range[4]; - unsigned int sram_addr; }; static struct msic_batt_sfi_prop *sfi_table; +/* Thse are temporary fixes once the FW supports + * IPC/SFI mechanism to pass these addresses these + * variables will be removed. + */ +static unsigned int sram_intr_addr; +static unsigned int sram_ocv_addr; + /********************************************************************* * Battery properties *********************************************************************/ @@ -459,7 +465,8 @@ struct msic_power_module_info { unsigned long update_time; /* jiffies when data read */ - void __iomem *msic_regs_iomap; + void __iomem *msic_intr_iomap; + void __iomem *msic_ocv_iomap; /* spin lock to protect driver event related variables * these event variables are being modified from @@ -2086,6 +2093,7 @@ fault_detected: else if (!is_fault && is_active) delay = delay / 6; /* 10 Sec delay */ + power_supply_changed(&mbi->batt); schedule_delayed_work(&mbi->chr_status_monitor, delay); } @@ -2111,7 +2119,7 @@ static irqreturn_t msic_battery_interrupt_handler(int id, void *dev) return IRQ_WAKE_THREAD; } /* Copy Interrupt registers locally */ - reg_int_val = readl(mbi->msic_regs_iomap); + reg_int_val = readl(mbi->msic_intr_iomap); /* Add the Interrupt regs to FIFO */ kfifo_in(&irq_fifo, ®_int_val, sizeof(u32)); @@ -2269,6 +2277,31 @@ static ssize_t get_chrg_enable(struct device *dev, return sprintf(buf, "%d\n", val); } + +static void ipc_ocv_to_chrg_update(struct msic_power_module_info *mbi) +{ + int err; + unsigned int vocv, chr_ocv; + + vocv = readl(mbi->msic_ocv_iomap); + vocv = MSIC_ADC_TO_VOL(vocv); + dev_dbg(msic_dev, "sram vocv conv:%d\n", vocv); + + /* lookup for equivalent Open circuit charge value */ + chr_ocv = dischrg_curve_lookup(vocv, 0); + + if (mbi->charging_mode == BATT_CHARGING_MODE_NONE) + chr_ocv |= ~MSIC_BATT_ADC_ACCCHRGVAL_MASK; + else + chr_ocv &= MSIC_BATT_ADC_ACCCHRGVAL_MASK; + + /* Send the Open Circuit Charge Value to SCU */ + err = intel_scu_ipc_command(IPCMSG_BATTERY, IPCCMD_CC_WRITE, &chr_ocv, + sizeof(chr_ocv), NULL, 0); + if (err) + dev_warn(msic_dev, "IPC Command Failed %s\n", __func__); +} + /** * sfi_table_populate - Simple Firmware Interface table Populate * @sfi_table: Simple Firmware Interface table structure @@ -2337,7 +2370,9 @@ static void sfi_table_populate(struct msic_batt_sfi_prop *sfi_table) sfi_table->temp_mon_range[3].maint_chrg_vol_ll = 3950; sfi_table->temp_mon_range[3].maint_chrg_vol_ul = 3950; - sfi_table->sram_addr = 0xFFFF7FC3; + /* Temporary fixes untill FW support is available */ + sram_intr_addr = 0xFFFF7FC3; + sram_ocv_addr = 0xFFFF3008; } /** @@ -2514,13 +2549,22 @@ static int msic_battery_probe(struct platform_device *pdev) init_charger_props(mbi); /* Re Map Phy address space for MSIC regs */ - mbi->msic_regs_iomap = ioremap_nocache(sfi_table->sram_addr, 8); - if (!mbi->msic_regs_iomap) { + mbi->msic_intr_iomap = ioremap_nocache(sram_intr_addr, 8); + if (!mbi->msic_intr_iomap) { dev_err(&pdev->dev, "battery: ioremap Failed\n"); retval = -ENOMEM; - goto ioremap_failed; + goto ioremap_intr_failed; } + mbi->msic_ocv_iomap = ioremap_nocache(sram_ocv_addr, 8); + if (!mbi->msic_ocv_iomap) { + dev_err(&pdev->dev, "battery: ioremap of fuel" + " gauging regs Failed\n"); + retval = -ENOMEM; + goto ioremap_ocv_failed; + } + ipc_ocv_to_chrg_update(mbi); + /* Init MSIC Registers */ retval = init_msic_regs(mbi); if (retval < 0) @@ -2594,7 +2638,6 @@ static int msic_battery_probe(struct platform_device *pdev) goto requestirq_failed; } - /* Start the status monitoring worker */ schedule_delayed_work(&mbi->chr_status_monitor, 0); return retval; @@ -2610,8 +2653,10 @@ sysfs1_create_faied: power_reg_failed_usb: power_supply_unregister(&mbi->batt); power_reg_failed_batt: - iounmap(mbi->msic_regs_iomap); -ioremap_failed: + iounmap(mbi->msic_ocv_iomap); +ioremap_ocv_failed: + iounmap(mbi->msic_intr_iomap); +ioremap_intr_failed: kfree(sfi_table); kfree(mbi); @@ -2650,8 +2695,10 @@ static int msic_battery_remove(struct platform_device *pdev) free_adc_channels(mbi->adc_index, mbi); free_irq(mbi->irq, mbi); do_exit_ops(mbi); - if (mbi->msic_regs_iomap != NULL) - iounmap(mbi->msic_regs_iomap); + if (mbi->msic_intr_iomap != NULL) + iounmap(mbi->msic_intr_iomap); + if (mbi->msic_ocv_iomap != NULL) + iounmap(mbi->msic_ocv_iomap); device_remove_file(&pdev->dev, &dev_attr_emrg_charge_enable); device_remove_file(&pdev->dev, &dev_attr_charge_enable); power_supply_unregister(&mbi->usb); -- 1.7.2.3 _______________________________________________ MeeGo-kernel mailing list MeeGo-kernel@lists.meego.com http://lists.meego.com/listinfo/meego-kernel