On Wed, 5 Jan 2011 12:42:40 +0800 <[email protected]> wrote: > > --- > > arch/x86/platform/mrst/mrst.c | 23 +++++++++++++++++++++++ > > 1 files changed, 23 insertions(+), 0 deletions(-) > > > > diff --git a/arch/x86/platform/mrst/mrst.c > b/arch/x86/platform/mrst/mrst.c > > index 88c0f78..f71d0aa 100644 > > --- a/arch/x86/platform/mrst/mrst.c > > +++ b/arch/x86/platform/mrst/mrst.c > > @@ -43,6 +43,8 @@ > > #include <asm/apb_timer.h> > > #include <asm/reboot.h> > > > > +#define LANGWELL_GPIO_ALT_ADDR 0xff12c038 > > + > > /* > > * the clockevent devices on Moorestown/Medfield can be APBT or LAPIC > clock, > > * cmdline option x86_mrst_timer can be used to override the > configuration > > @@ -995,10 +997,31 @@ static int __init sfi_parse_devs(struct > sfi_table_header > > *table) > > return 0; > > } > > > > +/* setting multi-function-pin */ > > +static void set_alt_func(void) > > +{ > > + u32 __iomem *mem = ioremap_nocache(LANGWELL_GPIO_ALT_ADDR, > > 16); > > + u32 value; > > + > > + if (!mem) { > > + pr_err("can not map GPIO controller address.\n"); > > + return; > > + } > > + > > + /* set alt function on gpio pins 24-43 so keypad will work */ > > + value = (readl(mem + 1) & 0x0000ffff) | 0x55550000; > > + writel(value, mem + 1); > > + value = (readl(mem + 2) & 0xf0000000) | 0x05555555; > > Please check this value, "0x05555555." It looks like to affect gpio44 > and gpio45. > > Jekyll
You are correct, I will update the patch. Thanks! _______________________________________________ MeeGo-kernel mailing list [email protected] http://lists.meego.com/listinfo/meego-kernel
