On Tue, 22 Feb 2011 11:27:29 +0530 Tom <[email protected]> wrote:
> Got it... > > Regards, > Tom > > On Tue, Feb 22, 2011 at 9:48 AM, Arjan van de Ven > <[email protected]>wrote: > > > On 2/21/2011 8:01 PM, Tom wrote: > > > >> Hi, > >> > >> Kernel Oops on MRST CDK after changing the clock source from APB > >> timers to APIC. > >> Attached is the log file from early prints. > >> > > > > .... on a 2.6.35 kernel. Sorry. I can't support MRST on a 2.6.35 > > kernel. You may find someone who does, like via your Intel rep ... > > but MeeGo.com does not. We use 2.6.37 for MRST, for stability > > reasons. In addition, the bootlog you posted is for the A3 stepping > > of the chipset, while we only support stepping C0 and later (A3 had > > too many bugs that we don't want to work around) > > > > How is the contact with your Intel rep going on hardware driver/etc > > support for your design ? > > > > (Read this as a hint that Moorestown kernel questions for such a > > non-MeeGo-1.2 kernel are just not going to give you something > > useful on this mailing list... please just post them directly to > > your Intel rep instead of posting them to this mailing list) > > This does look like a regression. it happens on 37 kernel as well. looks like the first APB timer is not registered as broadcast clockevent as it used to be when lapic timers are used. I am looking into it. _______________________________________________ MeeGo-kernel mailing list [email protected] http://lists.meego.com/listinfo/meego-kernel
