xf86-video-intel of Q3 release will require new libdrm, this request is not only a bugfix, but also a moving toward Q3 release.
-----Original Message----- From: Zhu, Peter J Sent: Friday, September 10, 2010 11:59 PM To: [email protected]; Li, Peng Subject: RE: [meego-commits] 7446: Changes to Trunk:Testing/xorg-x11-drv-intel Why not back port especially it also requires new libdrm? Peter > -----Original Message----- > From: [email protected] > [mailto:[email protected]] On Behalf Of Li Peng > Sent: Friday, September 10, 2010 4:04 PM > To: [email protected] > Subject: [meego-commits] 7446: Changes to Trunk:Testing/xorg-x11-drv-intel > > Hi, > I have made the following changes to xorg-x11-drv-intel in project > Trunk:Testing. > Please review and accept ASAP. > > Thank You, > Li Peng > > [This message was auto-generated] > > --- > > Request #7446: > > submit: devel:x11:Trunk/xorg-x11-drv-intel(r31) -> > Trunk:Testing/xorg-x11-drv-intel > > > Message: > update to latest git version, fix BMC #6303 > > State: new 2010-09-10T01:03:53 pli1 > Comment: None > > > > changes files: > -------------- > --- xorg-x11-drv-intel.changes > +++ xorg-x11-drv-intel.changes > @@ -0,0 +1,3 @@ > +* Fri Sep 10 2010 Li Peng <[email protected]> - 2.12.99~git0515256490 > +- update to latest git version, fix BMC #6303 > + > > old: > ---- > xf86-video-intel-2.12.99~git104cd0554b.tar.bz2 > > new: > ---- > xf86-video-intel-2.12.99~git0515256490.tar.bz2 > > spec files: > ----------- > --- xorg-x11-drv-intel.spec > +++ xorg-x11-drv-intel.spec > @@ -7,7 +7,7 @@ > > Name: xorg-x11-drv-intel > Summary: Xorg X11 Intel video driver > -Version: 2.12.99~git104cd0554b > +Version: 2.12.99~git0515256490 > Release: 1 > Group: System/X Hardware Support > License: MIT > > other changes: > -------------- > > ++++++ xf86-video-intel-2.12.99~git104cd0554b.tar.bz2 -> > xf86-video-intel-2.12.99~git0515256490.tar.bz2 > --- man/intel.man > +++ man/intel.man > @@ -156,6 +156,20 @@ > .IP > Default: Disabled > .TP > +.BI "Option \*qShadow\*q \*q" boolean \*q > +This option controls the use of GPU acceleration and placement of auxiliary > +buffers in memory. Enabling the Shadow will disable all use of the GPU for > +RENDER acceleration and force software-fallbacks for all but updating the > +scan-out buffer. Hardware overlay is still supported so Xv will continue to > +playback videos using the GPU, but GL will be forced to use software > +rasterisation as well. This is a last resort measure for systems with > +crippling bugs, such as early 8xx chipsets. It is still hoped that we will > +find a workaround to enable as much hardware acceleration on those > +architectures as is possible, but until then, using a shadow buffer should > +maintain system stability. > +.IP > +Default: Disabled > +.TP > .BI "Option \*qSwapbuffersWait\*q \*q" boolean \*q > This option controls the behavior of glXSwapBuffers and > glXCopySubBufferMESA > calls by GL applications. If enabled, the calls will avoid tearing by making > --- src/intel.h > +++ src/intel.h > @@ -271,6 +271,7 @@ > }; > > typedef struct intel_screen_private { > + ScrnInfoPtr scrn; > unsigned char *MMIOBase; > int cpp; > > @@ -281,7 +282,10 @@ > long GTTMapSize; > > void *modes; > - drm_intel_bo *front_buffer; > + drm_intel_bo *front_buffer, *shadow_buffer; > + long front_pitch, front_tiling; > + PixmapPtr shadow_pixmap; > + DamagePtr shadow_damage; > > dri_bufmgr *bufmgr; > > @@ -415,6 +419,7 @@ > > Bool use_pageflipping; > Bool force_fallback; > + Bool use_shadow; > > /* Broken-out options. */ > OptionInfoPtr Options; > @@ -446,7 +451,9 @@ > extern int intel_crtc_id(xf86CrtcPtr crtc); > extern int intel_output_dpms_status(xf86OutputPtr output); > > -extern Bool intel_do_pageflip(ScreenPtr screen, dri_bo *new_front, void > *data); > +extern Bool intel_do_pageflip(intel_screen_private *intel, > + dri_bo *new_front, > + void *data); > > static inline intel_screen_private * > intel_get_screen_private(ScrnInfoPtr scrn) > @@ -501,7 +508,8 @@ > > drm_intel_bo *intel_allocate_framebuffer(ScrnInfoPtr scrn, > int w, int h, int cpp, > - unsigned long *pitch); > + unsigned long *pitch, > + uint32_t *tiling); > > /* i830_render.c */ > Bool i830_check_composite(int op, > --- src/intel_batchbuffer.h > +++ src/intel_batchbuffer.h > @@ -153,6 +153,9 @@ > #define OUT_RELOC(bo, read_domains, write_domains, delta) \ > intel_batch_emit_reloc(intel, bo, read_domains, write_domains, delta, 0) > > +#define OUT_RELOC_FENCED(bo, read_domains, write_domains, delta) \ > + intel_batch_emit_reloc(intel, bo, read_domains, write_domains, delta, 1) > + > #define OUT_RELOC_PIXMAP(pixmap, reads, write, delta) \ > intel_batch_emit_reloc_pixmap(intel, pixmap, reads, write, delta, 0) > > --- src/intel_display.c > +++ src/intel_display.c > @@ -86,9 +86,9 @@ > struct intel_property *props; > void *private_data; > > - Bool has_lvds_limits; > - int lvds_hdisplay; > - int lvds_vdisplay; > + Bool has_panel_limits; > + int panel_hdisplay; > + int panel_vdisplay; > > int dpms_mode; > const char *backlight_iface; > @@ -239,9 +239,9 @@ > sprintf(path, "%s/%s", BACKLIGHT_CLASS, > backlight_interfaces[i]); > if (!stat(path, &buf)) { > intel_output->backlight_iface = backlight_interfaces[i]; > - intel_output->backlight_active_level = > intel_output_backlight_get(output); > intel_output->backlight_max = > intel_output_backlight_get_max(output); > if (intel_output->backlight_max > 0) { > + intel_output->backlight_active_level = > intel_output_backlight_get(output); > xf86DrvMsg(output->scrn->scrnIndex, X_INFO, > "found backlight control interface > %s\n", path); > return; > @@ -488,12 +488,14 @@ > struct intel_crtc *intel_crtc = crtc->driver_private; > struct intel_mode *mode = intel_crtc->mode; > unsigned long rotate_pitch; > + uint32_t tiling; > int ret; > > intel_crtc->rotate_bo = intel_allocate_framebuffer(scrn, > width, height, > mode->cpp, > - &rotate_pitch); > + &rotate_pitch, > + &tiling); > > if (!intel_crtc->rotate_bo) { > xf86DrvMsg(crtc->scrn->scrnIndex, X_ERROR, > @@ -580,7 +582,7 @@ > intel_crtc->rotate_bo = NULL; > } > > - intel->shadow_present = FALSE; > + intel->shadow_present = intel->use_shadow; > } > > static void > @@ -689,12 +691,12 @@ > struct intel_output *intel_output = output->driver_private; > > /* > - * If the connector type is LVDS, we will use the panel limit to > + * If the connector type is a panel, we will use the panel limit to > * verfiy whether the mode is valid. > */ > - if (intel_output->has_lvds_limits) { > - if (pModes->HDisplay > intel_output->lvds_hdisplay || > - pModes->VDisplay > intel_output->lvds_vdisplay) > + if (intel_output->has_panel_limits) { > + if (pModes->HDisplay > intel_output->panel_hdisplay || > + pModes->VDisplay > intel_output->panel_vdisplay) > return MODE_PANEL; > } > > @@ -708,6 +710,7 @@ > drmModeConnectorPtr koutput = intel_output->mode_output; > struct intel_mode *mode = intel_output->mode; > drmModePropertyBlobPtr edid_blob = NULL; > + xf86MonPtr mon = NULL; > int i; > > /* look for an EDID property */ > @@ -733,19 +736,21 @@ > } > > if (edid_blob) { > - xf86OutputSetEDID(output, > - xf86InterpretEDID(output->scrn->scrnIndex, > - edid_blob->data)); > - drmModeFreePropertyBlob(edid_blob); > - } else { > - xf86OutputSetEDID(output, > - xf86InterpretEDID(output->scrn->scrnIndex, > - NULL)); > + mon = xf86InterpretEDID(output->scrn->scrnIndex, > + edid_blob->data); > + > + if (mon && edid_blob->length > 128) > + mon->flags |= MONITOR_EDID_COMPLETE_RAWDATA; > } > + > + xf86OutputSetEDID(output, mon); > + > + if (edid_blob) > + drmModeFreePropertyBlob(edid_blob); > } > > static DisplayModePtr > -intel_output_lvds_edid(xf86OutputPtr output, DisplayModePtr modes) > +intel_output_panel_edid(xf86OutputPtr output, DisplayModePtr modes) > { > xf86MonPtr mon = output->MonInfo; > > @@ -812,28 +817,29 @@ > } > > /* > - * If the connector type is LVDS, we will traverse the kernel mode to > + * If the connector type is a panel, we will traverse the kernel mode to > * get the panel limit. And then add all the standard modes to fake > * the fullscreen experience. > * If it is incorrect, please fix me. > */ > - intel_output->has_lvds_limits = FALSE; > - if (koutput->connector_type == DRM_MODE_CONNECTOR_LVDS) { > + intel_output->has_panel_limits = FALSE; > + if (koutput->connector_type == DRM_MODE_CONNECTOR_LVDS || > + koutput->connector_type == DRM_MODE_CONNECTOR_eDP) { > for (i = 0; i < koutput->count_modes; i++) { > drmModeModeInfo *mode_ptr; > > mode_ptr = &koutput->modes[i]; > - if (mode_ptr->hdisplay > intel_output->lvds_hdisplay) > - intel_output->lvds_hdisplay = > mode_ptr->hdisplay; > - if (mode_ptr->vdisplay > intel_output->lvds_vdisplay) > - intel_output->lvds_vdisplay = > mode_ptr->vdisplay; > + if (mode_ptr->hdisplay > intel_output->panel_hdisplay) > + intel_output->panel_hdisplay = > mode_ptr->hdisplay; > + if (mode_ptr->vdisplay > intel_output->panel_vdisplay) > + intel_output->panel_vdisplay = > mode_ptr->vdisplay; > } > > - intel_output->has_lvds_limits = > - intel_output->lvds_hdisplay && > - intel_output->lvds_vdisplay; > + intel_output->has_panel_limits = > + intel_output->panel_hdisplay && > + intel_output->panel_vdisplay; > > - Modes = intel_output_lvds_edid(output, Modes); > + Modes = intel_output_panel_edid(output, Modes); > } > > return Modes; > @@ -1287,7 +1293,8 @@ > output->subpixel_order = subpixel_conv_table[koutput->subpixel]; > output->driver_private = intel_output; > > - if (koutput->connector_type == DRM_MODE_CONNECTOR_LVDS) > + if (koutput->connector_type == DRM_MODE_CONNECTOR_LVDS || > + koutput->connector_type == DRM_MODE_CONNECTOR_eDP) > intel_output_backlight_init(output); > > output->possible_crtcs = kencoder->possible_crtcs; > @@ -1306,11 +1313,10 @@ > intel_screen_private *intel = intel_get_screen_private(scrn); > drm_intel_bo *old_front = NULL; > Bool ret; > - ScreenPtr screen = screenInfo.screens[scrn->scrnIndex]; > - PixmapPtr pixmap; > uint32_t old_fb_id; > int i, old_width, old_height, old_pitch; > unsigned long pitch; > + uint32_t tiling; > > if (scrn->virtualX == width && scrn->virtualY == height) > return TRUE; > @@ -1324,7 +1330,8 @@ > intel->front_buffer = intel_allocate_framebuffer(scrn, > width, height, > intel->cpp, > - &pitch); > + &pitch, > + &tiling); > if (!intel->front_buffer) > goto fail; > > @@ -1335,14 +1342,11 @@ > if (ret) > goto fail; > > + intel->front_pitch = pitch; > + intel->front_tiling = tiling; > + > scrn->virtualX = width; > scrn->virtualY = height; > - scrn->displayWidth = pitch / intel->cpp; > - > - pixmap = screen->GetScreenPixmap(screen); > - screen->ModifyPixmapHeader(pixmap, width, height, -1, -1, pitch, NULL); > - intel_set_pixmap_bo(pixmap, intel->front_buffer); > - intel_get_pixmap_private(pixmap)->busy = 1; > > for (i = 0; i < xf86_config->num_crtc; i++) { > xf86CrtcPtr crtc = xf86_config->crtc[i]; > @@ -1354,6 +1358,8 @@ > goto fail; > } > > + intel_uxa_create_screen_resources(scrn->pScreen); > + > if (old_fb_id) > drmModeRmFB(mode->fd, old_fb_id); > if (old_front) > @@ -1376,10 +1382,11 @@ > } > > Bool > -intel_do_pageflip(ScreenPtr screen, dri_bo *new_front, void *data) > +intel_do_pageflip(intel_screen_private *intel, > + dri_bo *new_front, > + void *data) > { > - ScrnInfoPtr scrn = xf86Screens[screen->myNum]; > - intel_screen_private *intel = intel_get_screen_private(scrn); > + ScrnInfoPtr scrn = intel->scrn; > xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(scrn); > struct intel_crtc *crtc = config->crtc[0]->driver_private; > struct intel_mode *mode = crtc->mode; > @@ -1450,22 +1457,31 @@ > { > struct intel_mode *mode = event_data; > > + > mode->flip_count--; > if (mode->flip_count > 0) > return; > > drmModeRmFB(mode->fd, mode->old_fb_id); > > + if (mode->event_data == NULL) > + return; > + > I830DRI2FlipEventHandler(frame, tv_sec, tv_usec, mode->event_data); > } > > static void > drm_wakeup_handler(pointer data, int err, pointer p) > { > - struct intel_mode *mode = data; > - fd_set *read_mask = p; > + struct intel_mode *mode; > + fd_set *read_mask; > + > + if (data == NULL || err < 0) > + return; > > - if (err >= 0 && FD_ISSET(mode->fd, read_mask)) > + mode = data; > + read_mask = p; > + if (FD_ISSET(mode->fd, read_mask)) > drmHandleEvent(mode->fd, &mode->event_context); > } > > --- src/intel_dri.c > +++ src/intel_dri.c > @@ -488,10 +488,10 @@ > * flipping buffers as necessary. > */ > static Bool > -I830DRI2ScheduleFlip(ClientPtr client, DrawablePtr draw, DRI2BufferPtr front, > +I830DRI2ScheduleFlip(struct intel_screen_private *intel, > + ClientPtr client, DrawablePtr draw, DRI2BufferPtr front, > DRI2BufferPtr back, DRI2SwapEventPtr func, void *data) > { > - ScreenPtr screen = draw->pScreen; > I830DRI2BufferPrivatePtr back_priv; > DRI2FrameEventPtr flip_info; > > @@ -507,7 +507,7 @@ > > /* Page flip the full screen buffer */ > back_priv = back->driverPrivate; > - return intel_do_pageflip(screen, > + return intel_do_pageflip(intel, > intel_get_pixmap_bo(back_priv->pixmap), > flip_info); > } > @@ -567,7 +567,8 @@ > if (DRI2CanFlip(drawable) && !intel->shadow_present && > intel->use_pageflipping && > can_exchange(event->front, event->back) && > - I830DRI2ScheduleFlip(event->client, drawable, event->front, > + I830DRI2ScheduleFlip(intel, > + event->client, drawable, event->front, > event->back, event->event_complete, > event->event_data)) { > I830DRI2ExchangeBuffers(drawable, > --- src/intel_driver.c > +++ src/intel_driver.c > @@ -98,6 +98,7 @@ > OPTION_COLOR_KEY, > OPTION_FALLBACKDEBUG, > OPTION_TILING, > + OPTION_SHADOW, > OPTION_SWAPBUFFERS_WAIT, > #ifdef INTEL_XVMC > OPTION_XVMC, > @@ -115,6 +116,7 @@ > {OPTION_VIDEO_KEY, "VideoKey", OPTV_INTEGER, {0}, FALSE}, > {OPTION_FALLBACKDEBUG, "FallbackDebug", OPTV_BOOLEAN, {0}, > FALSE}, > {OPTION_TILING, "Tiling", OPTV_BOOLEAN, {0}, TRUE}, > + {OPTION_SHADOW, "Shadow", OPTV_BOOLEAN, {0}, FALSE}, > {OPTION_SWAPBUFFERS_WAIT, "SwapbuffersWait", OPTV_BOOLEAN, > {0}, TRUE}, > #ifdef INTEL_XVMC > {OPTION_XVMC, "XvMC", OPTV_BOOLEAN, {0}, TRUE}, > @@ -536,6 +538,7 @@ > > scrn->driverPrivate = intel; > } > + intel->scrn = scrn; > intel->pEnt = pEnt; > > scrn->displayWidth = 640; /* default it */ > @@ -726,13 +729,16 @@ > intel_init_initial_framebuffer(ScrnInfoPtr scrn) > { > intel_screen_private *intel = intel_get_screen_private(scrn); > + int width = scrn->virtualX; > + int height = scrn->virtualY; > unsigned long pitch; > + uint32_t tiling; > > intel->front_buffer = intel_allocate_framebuffer(scrn, > - scrn->virtualX, > - scrn->virtualY, > + width, height, > intel->cpp, > - &pitch); > + &pitch, > + &tiling); > > if (!intel->front_buffer) { > xf86DrvMsg(scrn->scrnIndex, X_ERROR, > @@ -740,6 +746,8 @@ > return FALSE; > } > > + intel->front_pitch = pitch; > + intel->front_tiling = tiling; > scrn->displayWidth = pitch / intel->cpp; > > return TRUE; > @@ -828,6 +836,9 @@ > intel->directRenderingType = DRI_DRI2; > #endif > > + intel->force_fallback = FALSE; > + intel->use_shadow = FALSE; > + > /* Enable tiling by default */ > intel->tiling = TRUE; > > @@ -839,6 +850,17 @@ > intel->tiling = FALSE; > } > > + if (xf86IsOptionSet(intel->Options, OPTION_SHADOW)) { > + if (xf86ReturnOptValBool(intel->Options, OPTION_SHADOW, FALSE)) > + intel->force_fallback = intel->use_shadow = TRUE; > + } > + > + if (intel->use_shadow) { > + xf86DrvMsg(scrn->scrnIndex, X_CONFIG, > + "Shadow buffer enabled," > + " GPU acceleration disabled.\n"); > + } > + > /* SwapBuffers delays to avoid tearing */ > intel->swapbuffers_wait = TRUE; > > @@ -1101,6 +1123,8 @@ > I830LeaveVT(scrnIndex, 0); > } > > + DeleteCallback(&FlushCallback, intel_flush_callback, scrn); > + > if (intel->uxa_driver) { > uxa_driver_fini(screen); > free(intel->uxa_driver); > @@ -1108,13 +1132,31 @@ > } > > if (intel->front_buffer) { > - intel_set_pixmap_bo(screen->GetScreenPixmap(screen), NULL); > + if (!intel->use_shadow) > + intel_set_pixmap_bo(screen->GetScreenPixmap(screen), > + NULL); > intel_mode_remove_fb(intel); > drm_intel_bo_unreference(intel->front_buffer); > intel->front_buffer = NULL; > } > > - DeleteCallback(&FlushCallback, intel_flush_callback, scrn); > + if (intel->shadow_pixmap) { > + PixmapPtr pixmap = intel->shadow_pixmap; > + > + if (intel->shadow_damage) { > + DamageUnregister(&pixmap->drawable, > + intel->shadow_damage); > + DamageDestroy(intel->shadow_damage); > + intel->shadow_damage = NULL; > + } > + > + if (intel->shadow_buffer) { > + drm_intel_bo_unreference(intel->shadow_buffer); > + intel->shadow_buffer = NULL; > + } > + > + intel->shadow_pixmap = NULL; > + } > > intel_batch_teardown(scrn); > > --- src/intel_driver.h > +++ src/intel_driver.h > @@ -168,12 +168,17 @@ > #define PCI_CHIP_IGDNG_M_G_BRIDGE 0x0044 > #endif > > -#ifndef PCI_CHIP_SANDYBRIDGE > -#define PCI_CHIP_SANDYBRIDGE 0x0102 > -#define PCI_CHIP_SANDYBRIDGE_BRIDGE 0x0100 > -#define PCI_CHIP_SANDYBRIDGE_M 0x0106 > -#define PCI_CHIP_SANDYBRIDGE_M_D0 0x0126 > -#define PCI_CHIP_SANDYBRIDGE_BRIDGE_M 0x0104 > +#ifndef PCI_CHIP_SANDYBRIDGE_BRIDGE > +#define PCI_CHIP_SANDYBRIDGE_BRIDGE 0x0100 /* Desktop */ > +#define PCI_CHIP_SANDYBRIDGE_GT1 0x0102 > +#define PCI_CHIP_SANDYBRIDGE_GT2 0x0112 > +#define PCI_CHIP_SANDYBRIDGE_GT2_PLUS 0x0122 > +#define PCI_CHIP_SANDYBRIDGE_BRIDGE_M 0x0104 /* Mobile */ > +#define PCI_CHIP_SANDYBRIDGE_M_GT1 0x0106 > +#define PCI_CHIP_SANDYBRIDGE_M_GT2 0x0116 > +#define PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS 0x0126 > +#define PCI_CHIP_SANDYBRIDGE_BRIDGE_S 0x0108 /* Server */ > +#define PCI_CHIP_SANDYBRIDGE_S_GT 0x010A > #endif > > #define I85X_CAPID 0x44 > @@ -242,9 +247,13 @@ > > #define IS_I915(pI810) (IS_I915G(pI810) || IS_I915GM(pI810) || > IS_I945G(pI810) || IS_I945GM(pI810) || IS_G33CLASS(pI810)) > > -#define IS_GEN6(pI810) ((pI810)->PciInfo->device_id == > PCI_CHIP_SANDYBRIDGE || \ > - (pI810)->PciInfo->device_id == PCI_CHIP_SANDYBRIDGE_M > ||\ > - (pI810)->PciInfo->device_id == > PCI_CHIP_SANDYBRIDGE_M_D0) > +#define IS_GEN6(pI810) ((pI810)->PciInfo->device_id == > PCI_CHIP_SANDYBRIDGE_GT1 || \ > + (pI810)->PciInfo->device_id == PCI_CHIP_SANDYBRIDGE_GT2 > || > \ > + (pI810)->PciInfo->device_id == > PCI_CHIP_SANDYBRIDGE_GT2_PLUS || \ > + (pI810)->PciInfo->device_id == > PCI_CHIP_SANDYBRIDGE_M_GT1 ||\ > + (pI810)->PciInfo->device_id == > PCI_CHIP_SANDYBRIDGE_M_GT2 || \ > + (pI810)->PciInfo->device_id == > PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS ||\ > + (pI810)->PciInfo->device_id == > PCI_CHIP_SANDYBRIDGE_S_GT) > > #define IS_MOBILE(pI810) (IS_I830(pI810) || IS_I85X(pI810) || > IS_I915GM(pI810) || IS_I945GM(pI810) || IS_I965GM(pI810) || > IS_GM45(pI810) || IS_IGD(pI810) || IS_IGDNG_M(pI810)) > /* supports Y tiled surfaces (pre-965 Mesa isn't ready yet) */ > --- src/intel_memory.c > +++ src/intel_memory.c > @@ -178,7 +178,8 @@ > */ > drm_intel_bo *intel_allocate_framebuffer(ScrnInfoPtr scrn, > int width, int height, int cpp, > - unsigned long *out_pitch) > + unsigned long *out_pitch, > + uint32_t *out_tiling) > { > intel_screen_private *intel = intel_get_screen_private(scrn); > drm_intel_bo *front_buffer; > @@ -241,6 +242,7 @@ > > intel_set_gem_max_sizes(scrn); > *out_pitch = pitch; > + *out_tiling = tiling_mode; > > return front_buffer; > } > --- src/intel_module.c > +++ src/intel_module.c > @@ -72,6 +72,13 @@ > {PCI_CHIP_B43_G, "B43"}, > {PCI_CHIP_IGDNG_D_G, "Clarkdale"}, > {PCI_CHIP_IGDNG_M_G, "Arrandale"}, > + {PCI_CHIP_SANDYBRIDGE_GT1, "Sandybridge" }, > + {PCI_CHIP_SANDYBRIDGE_GT2, "Sandybridge" }, > + {PCI_CHIP_SANDYBRIDGE_GT2_PLUS, "Sandybridge" }, > + {PCI_CHIP_SANDYBRIDGE_M_GT1, "Sandybridge" }, > + {PCI_CHIP_SANDYBRIDGE_M_GT2, "Sandybridge" }, > + {PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS, "Sandybridge" }, > + {PCI_CHIP_SANDYBRIDGE_S_GT, "Sandybridge" }, > {-1, NULL} > }; > SymTabRec *intel_chipsets = (SymTabRec *) _intel_chipsets; > @@ -114,9 +121,13 @@ > INTEL_DEVICE_MATCH (PCI_CHIP_B43_G, 0 ), > INTEL_DEVICE_MATCH (PCI_CHIP_IGDNG_D_G, 0 ), > INTEL_DEVICE_MATCH (PCI_CHIP_IGDNG_M_G, 0 ), > - INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE, 0 ), > - INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE_M, 0 ), > - INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE_M_D0, 0 ), > + INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE_GT1, 0 ), > + INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE_GT2, 0 ), > + INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE_GT2_PLUS, 0 ), > + INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE_M_GT1, 0 ), > + INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE_M_GT2, 0 ), > + INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS, 0 ), > + INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE_S_GT, 0 ), > { 0, 0, 0 }, > }; > > @@ -155,6 +166,13 @@ > {PCI_CHIP_B43_G, PCI_CHIP_B43_G, NULL}, > {PCI_CHIP_IGDNG_D_G, PCI_CHIP_IGDNG_D_G, NULL}, > {PCI_CHIP_IGDNG_M_G, PCI_CHIP_IGDNG_M_G, NULL}, > + {PCI_CHIP_SANDYBRIDGE_GT1, PCI_CHIP_SANDYBRIDGE_GT1, > NULL}, > + {PCI_CHIP_SANDYBRIDGE_GT2, PCI_CHIP_SANDYBRIDGE_GT2, > NULL}, > + {PCI_CHIP_SANDYBRIDGE_GT2_PLUS, > PCI_CHIP_SANDYBRIDGE_GT2_PLUS, NULL}, > + {PCI_CHIP_SANDYBRIDGE_M_GT1, PCI_CHIP_SANDYBRIDGE_M_GT1, > NULL}, > + {PCI_CHIP_SANDYBRIDGE_M_GT2, PCI_CHIP_SANDYBRIDGE_M_GT2, > NULL}, > + {PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS, > PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS, NULL}, > + {PCI_CHIP_SANDYBRIDGE_S_GT, > PCI_CHIP_SANDYBRIDGE_S_GT, NULL}, > {-1, -1, NULL } > }; > > @@ -290,6 +308,15 @@ > case PCI_CHIP_IGDNG_M_G: > chipset->name = "Arrandale"; > break; > + case PCI_CHIP_SANDYBRIDGE_GT1: > + case PCI_CHIP_SANDYBRIDGE_GT2: > + case PCI_CHIP_SANDYBRIDGE_GT2_PLUS: > + case PCI_CHIP_SANDYBRIDGE_M_GT1: > + case PCI_CHIP_SANDYBRIDGE_M_GT2: > + case PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS: > + case PCI_CHIP_SANDYBRIDGE_S_GT: > + chipset->name = "Sandybridge"; > + break; > default: > chipset->name = "unknown chipset"; > break; > --- src/intel_uxa.c > +++ src/intel_uxa.c > @@ -662,24 +662,16 @@ > (access == UXA_ACCESS_RW || priv->batch_write)) > intel_batch_submit(scrn, FALSE); > > - if (bo->size > intel->max_gtt_map_size) { > - ret = dri_bo_map(bo, access == UXA_ACCESS_RW); > - if (ret != 0) { > - xf86DrvMsg(scrn->scrnIndex, X_WARNING, > - "%s: bo map failed: %s\n", > - __FUNCTION__, > - strerror(-ret)); > - return FALSE; > - } > - } else { > + if (priv->tiling || bo->size <= intel->max_gtt_map_size) > ret = drm_intel_gem_bo_map_gtt(bo); > - if (ret != 0) { > - xf86DrvMsg(scrn->scrnIndex, X_WARNING, > - "%s: gtt bo map failed: %s\n", > - __FUNCTION__, > - strerror(-ret)); > - return FALSE; > - } > + else > + ret = dri_bo_map(bo, access == UXA_ACCESS_RW); > + if (ret) { > + xf86DrvMsg(scrn->scrnIndex, X_WARNING, > + "%s: bo map failed: %s\n", > + __FUNCTION__, > + strerror(-ret)); > + return FALSE; > } > > pixmap->devPrivate.ptr = bo->virtual; > @@ -690,18 +682,16 @@ > > static void intel_uxa_finish_access(PixmapPtr pixmap) > { > - dri_bo *bo = intel_get_pixmap_bo(pixmap); > ScreenPtr screen = pixmap->drawable.pScreen; > ScrnInfoPtr scrn = xf86Screens[screen->myNum]; > intel_screen_private *intel = intel_get_screen_private(scrn); > + struct intel_pixmap *priv = intel_get_pixmap_private(pixmap); > + dri_bo *bo = priv->bo; > > - if (bo == intel->front_buffer) > - intel->need_sync = TRUE; > - > - if (bo->size > intel->max_gtt_map_size) > - dri_bo_unmap(bo); > - else > + if (priv->tiling || bo->size <= intel->max_gtt_map_size) > drm_intel_gem_bo_unmap_gtt(bo); > + else > + dri_bo_unmap(bo); > > pixmap->devPrivate.ptr = NULL; > } > @@ -899,14 +889,197 @@ > scratch->drawable.pScreen->DestroyPixmap(scratch); > > return ret; > +} > + > +static dri_bo * > +intel_shadow_create_bo(intel_screen_private *intel, > + int16_t x1, int16_t y1, > + int16_t x2, int16_t y2, > + int *pitch) > +{ > + int w = x2 - x1, h = y2 - y1; > + int size = h * w * intel->cpp; > + dri_bo *bo; > + > + bo = drm_intel_bo_alloc(intel->bufmgr, "shadow", size, 0); > + if (bo && drm_intel_gem_bo_map_gtt(bo) == 0) { > + char *dst = bo->virtual; > + char *src = intel->shadow_pixmap->devPrivate.ptr; > + int src_pitch = intel->shadow_pixmap->devKind; > + int row_length = w * intel->cpp; > + int num_rows = h; > + src += y1 * src_pitch + x1 * intel->cpp; > + do { > + memcpy (dst, src, row_length); > + src += src_pitch; > + dst += row_length; > + } while (--num_rows); > + drm_intel_gem_bo_unmap_gtt(bo); > + } > > + *pitch = w * intel->cpp; > + return bo; > +} > + > +static void > +intel_shadow_blt(intel_screen_private *intel) > +{ > + ScrnInfoPtr scrn = intel->scrn; > + unsigned int dst_pitch; > + uint32_t blt, br13; > + RegionPtr region; > + BoxPtr box; > + int n; > + > + dst_pitch = intel->front_pitch; > + > + blt = XY_SRC_COPY_BLT_CMD; > + if (intel->cpp == 4) > + blt |= (XY_SRC_COPY_BLT_WRITE_ALPHA | > + XY_SRC_COPY_BLT_WRITE_RGB); > + > + if (IS_I965G(intel)) { > + if (intel->front_tiling) { > + dst_pitch >>= 2; > + blt |= XY_SRC_COPY_BLT_DST_TILED; > + } > + } > + > + br13 = ROP_S << 16 | dst_pitch; > + switch (intel->cpp) { > + default: > + case 4: br13 |= 1 << 25; /* RGB8888 */ > + case 2: br13 |= 1 << 24; /* RGB565 */ > + case 1: break; > + } > + > + region = DamageRegion(intel->shadow_damage); > + box = REGION_RECTS(region); > + n = REGION_NUM_RECTS(region); > + while (n--) { > + int pitch; > + dri_bo *bo; > + int offset; > + > + if (intel->shadow_buffer) { > + bo = intel->shadow_buffer; > + offset = box->x1 | box->y1 << 16; > + pitch = intel->shadow_pixmap->devKind; > + } else { > + bo = intel_shadow_create_bo(intel, > + box->x1, box->y1, > + box->x2, box->y2, > + &pitch); > + if (bo == NULL) > + return; > + > + offset = 0; > + } > + > + BEGIN_BATCH(8); > + OUT_BATCH(blt); > + OUT_BATCH(br13); > + OUT_BATCH(box->y1 << 16 | box->x1); > + OUT_BATCH(box->y2 << 16 | box->x2); > + OUT_RELOC_FENCED(intel->front_buffer, > + I915_GEM_DOMAIN_RENDER, > + I915_GEM_DOMAIN_RENDER, > + 0); > + OUT_BATCH(offset); > + OUT_BATCH(pitch); > + OUT_RELOC(bo, I915_GEM_DOMAIN_RENDER, 0, 0); > + > + ADVANCE_BATCH(); > + > + if (bo != intel->shadow_buffer) > + drm_intel_bo_unreference(bo); > + box++; > + } > +} > + > +static void intel_shadow_create(struct intel_screen_private *intel) > +{ > + ScrnInfoPtr scrn = intel->scrn; > + ScreenPtr screen = scrn->pScreen; > + PixmapPtr pixmap; > + int stride; > + > + if (IS_I8XX(intel)) > + pixmap = screen->GetScreenPixmap(screen); > + else > + pixmap = intel->shadow_pixmap; > + > + if (intel->shadow_damage) { > + DamageUnregister(&pixmap->drawable, intel->shadow_damage); > + DamageDestroy(intel->shadow_damage); > + } > + > + if (IS_I8XX(intel)) { > + dri_bo *bo; > + int size; > + > + /* Reduce the incoherency worries for gen2 > + * by only allocating a static shadow, at about 2-3x > + * performance cost for forcing rendering to uncached memory. > + */ > + if (intel->shadow_buffer) { > + drm_intel_gem_bo_unmap_gtt(intel->shadow_buffer); > + drm_intel_bo_unreference(intel->shadow_buffer); > + intel->shadow_buffer = NULL; > + } > + > + stride = ALIGN(scrn->virtualX * intel->cpp, 4); > + size = stride * scrn->virtualY; > + bo = drm_intel_bo_alloc(intel->bufmgr, > + "shadow", size, > + 0); > + if (bo && drm_intel_gem_bo_map_gtt(bo) == 0) { > + screen->ModifyPixmapHeader(pixmap, > + scrn->virtualX, > + scrn->virtualY, > + -1, -1, > + stride, > + bo->virtual); > + intel->shadow_buffer = bo; > + } > + } else { > + if (intel->shadow_pixmap) > + fbDestroyPixmap(intel->shadow_pixmap); > + > + pixmap = fbCreatePixmap(screen, > + scrn->virtualX, > + scrn->virtualY, > + scrn->depth, > + 0); > + > + screen->SetScreenPixmap(pixmap); > + stride = pixmap->devKind; > + } > + > + intel->shadow_pixmap = pixmap; > + intel->shadow_damage = DamageCreate(NULL, NULL, > + DamageReportNone, > + TRUE, > + screen, > + intel); > + DamageRegister(&pixmap->drawable, intel->shadow_damage); > + DamageSetReportAfterOp(intel->shadow_damage, TRUE); > + > + scrn->displayWidth = stride / intel->cpp; > } > > void intel_uxa_block_handler(intel_screen_private *intel) > { > - if (intel->need_sync) { > - dri_bo_wait_rendering(intel->front_buffer); > - intel->need_sync = FALSE; > + if (intel->shadow_damage && > + pixman_region_not_empty(DamageRegion(intel->shadow_damage))) > { > + intel_shadow_blt(intel); > + /* Emit a flush of the rendering cache, or on the 965 > + * and beyond rendering results may not hit the > + * framebuffer until significantly later. > + */ > + intel_batch_submit(intel->scrn, TRUE); > + > + DamageEmpty(intel->shadow_damage); > } > } > > @@ -1052,17 +1225,27 @@ > return TRUE; > } > > - > void intel_uxa_create_screen_resources(ScreenPtr screen) > { > ScrnInfoPtr scrn = xf86Screens[screen->myNum]; > intel_screen_private *intel = intel_get_screen_private(scrn); > - dri_bo *bo = intel->front_buffer; > > - if (bo != NULL) { > - PixmapPtr pixmap = screen->GetScreenPixmap(screen); > - intel_set_pixmap_bo(pixmap, bo); > - intel_get_pixmap_private(pixmap)->busy = 1; > + if (intel->use_shadow) { > + intel_shadow_create(intel); > + } else { > + dri_bo *bo = intel->front_buffer; > + if (bo != NULL) { > + PixmapPtr pixmap = screen->GetScreenPixmap(screen); > + intel_set_pixmap_bo(pixmap, bo); > + intel_get_pixmap_private(pixmap)->busy = 1; > + screen->ModifyPixmapHeader(pixmap, > + scrn->virtualX, > + scrn->virtualY, > + -1, -1, > + intel->front_pitch, > + NULL); > + } > + scrn->displayWidth = intel->front_pitch / intel->cpp; > } > } > > @@ -1138,8 +1321,6 @@ > > memset(intel->uxa_driver, 0, sizeof(*intel->uxa_driver)); > > - intel->force_fallback = FALSE; > - > intel->bufferOffset = 0; > intel->uxa_driver->uxa_major = 1; > intel->uxa_driver->uxa_minor = 0; > @@ -1213,6 +1394,7 @@ > } > > uxa_set_fallback_debug(screen, intel->fallback_debug); > + uxa_set_force_fallback(screen, intel->force_fallback); > > return TRUE; > } > --- src/intel_video.c > +++ src/intel_video.c > @@ -362,7 +362,9 @@ > /* Set up textured video if we can do it at this depth and we are on > * supported hardware. > */ > - if (scrn->bitsPerPixel >= 16 && (IS_I9XX(intel) || IS_I965G(intel))) { > + if (scrn->bitsPerPixel >= 16 && > + (IS_I9XX(intel) || IS_I965G(intel)) && > + !intel->use_shadow) { > texturedAdaptor = I830SetupImageVideoTextured(screen); > if (texturedAdaptor != NULL) { > xf86DrvMsg(scrn->scrnIndex, X_INFO, > --- uxa/uxa-glyphs.c > +++ uxa/uxa-glyphs.c > @@ -197,13 +197,6 @@ > > Bool uxa_glyphs_init(ScreenPtr pScreen) > { > - /* We are trying to initialise per screen resources prior to the > - * complete initialisation of the screen. So ensure the components > - * that we depend upon are initialsed prior to our use. > - */ > - if (!CreateScratchPixmapsForScreen(pScreen->myNum)) > - return FALSE; > - > #if HAS_DIXREGISTERPRIVATEKEY > if (!dixRegisterPrivateKey(&uxa_glyph_key, PRIVATE_GLYPH, 0)) > return FALSE; > @@ -212,6 +205,17 @@ > return FALSE; > #endif > > + /* Skip pixmap creation if we don't intend to use it. */ > + if (uxa_get_screen(pScreen)->force_fallback) > + return TRUE; > + > + /* We are trying to initialise per screen resources prior to the > + * complete initialisation of the screen. So ensure the components > + * that we depend upon are initialsed prior to our use. > + */ > + if (!CreateScratchPixmapsForScreen(pScreen->myNum)) > + return FALSE; > + > if (!uxa_realize_glyph_caches(pScreen)) > return FALSE; > > @@ -293,18 +297,19 @@ > } > > void > -uxa_glyph_unrealize(ScreenPtr pScreen, > - GlyphPtr pGlyph) > +uxa_glyph_unrealize(ScreenPtr screen, > + GlyphPtr glyph) > { > struct uxa_glyph *priv; > > - priv = uxa_glyph_get_private(pGlyph); > + /* Use Lookup in case we have not attached to this glyph. */ > + priv = dixLookupPrivate(&glyph->devPrivates, &uxa_glyph_key); > if (priv == NULL) > return; > > priv->cache->glyphs[priv->pos] = NULL; > > - uxa_glyph_set_private(pGlyph, NULL); > + uxa_glyph_set_private(glyph, NULL); > free(priv); > } > > @@ -780,9 +785,8 @@ > > mask_pixmap = > > uxa_get_drawable_pixmap(this_atlas->pDrawable); > - assert (uxa_pixmap_is_offscreen(mask_pixmap)); > - > - if (!uxa_screen->info->prepare_composite(op, > + if (!uxa_pixmap_is_offscreen(mask_pixmap) || > + !uxa_screen->info->prepare_composite(op, > > localSrc, this_atlas, pDst, > > src_pixmap, mask_pixmap, > dst_pixmap)) > return -1; > @@ -983,9 +987,8 @@ > > src_pixmap = > > uxa_get_drawable_pixmap(this_atlas->pDrawable); > - assert (uxa_pixmap_is_offscreen(src_pixmap)); > - > - if > (!uxa_screen->info->prepare_composite(PictOpAdd, > + if (!uxa_pixmap_is_offscreen(src_pixmap) || > + > !uxa_screen->info->prepare_composite(PictOpAdd, > > this_atlas, NULL, mask, > > src_pixmap, NULL, pixmap)) > return -1; > --- uxa/uxa.c > +++ uxa/uxa.c > @@ -385,12 +385,15 @@ > > uxa_glyphs_fini(pScreen); > > - /* Destroy the pixmap created by miScreenInit() *before* chaining up as > - * we finalize ourselves here and so this is the last chance we have of > - * releasing our resources associated with the Pixmap. So do it first. > - */ > - (void) (*pScreen->DestroyPixmap) (pScreen->devPrivate); > - pScreen->devPrivate = NULL; > + if (pScreen->devPrivate) { > + /* Destroy the pixmap created by miScreenInit() *before* > + * chaining up as we finalize ourselves here and so this > + * is the last chance we have of releasing our resources > + * associated with the Pixmap. So do it first. > + */ > + (void) (*pScreen->DestroyPixmap) (pScreen->devPrivate); > + pScreen->devPrivate = NULL; > + } > > pScreen->CreateGC = uxa_screen->SavedCreateGC; > pScreen->CloseScreen = uxa_screen->SavedCloseScreen; > > ++++++ xorg-x11-drv-intel.yaml > --- xorg-x11-drv-intel.yaml > +++ xorg-x11-drv-intel.yaml > @@ -1,6 +1,6 @@ > Name: xorg-x11-drv-intel > Summary: Xorg X11 Intel video driver > -Version: 2.12.99~git104cd0554b > +Version: 2.12.99~git0515256490 > Release: 1 > Group: System/X Hardware Support > License: MIT > > _______________________________________________ > Meego-commits mailing list > [email protected] > http://lists.meego.com/listinfo/meego-commits _______________________________________________ MeeGo-packaging mailing list [email protected] http://lists.meego.com/listinfo/meego-packaging
