> Just a remark:
>
> >The SPARC processor can shift a number by n positions in one step. This
> >is -what I estimate - implemented by direct wired ways, and the rest is
> >filled with zeros. The idea of RISC was to make simple but fast
> instructions
> >(and to increase the potetial of parallelity *). You can see this by the
> huge
> >number of transistor in a RISC chip. The number is up to 10x higher than
> >in the Pentium.
>
> The PII is able to shift two numbers by n positions in one step. The PII is
> a Post-RISC processor, ie it is able to execute 2 or 3 instructions per
> cycle and each basic instruction takes 1 cycle. The CISC and RISC
> architectures are both obsolete.
>
> Yves
I meant with step 1 cycle (for calculation only). Of course you can process
multiple instructions per cycle iff they are independent. How many depends on
the independency of the commands and the number of logic units.
But you have right with that what you said.
Bojan
PS: Have you read about the architecture of the Alpha 21264 ? It`s interesting!
