> I believe some of the current PDAs use StrongARM at speeds
> approaching 200 MHz. They have no floating point. There is at least
> one LL test client written for StrongARM.
>
I've heard of prototypes and proof of concept devices, but no actual
products. The only product that I'm aware of that use them and are in
production are some set top boxes and the empeg (car mp3 player, way cool).
I would think it would be very cool to have my car stereo discover the next
mersenne prime. *laugh*
> Based on the fact that Intel are apparently holding back the 100MHz
> FSB versions of the Celeron until Feb 2000 (according to August's
> "Personal Computer World" which arrived with me today) - the theory
> is that Intel don't want to undermine the PII/PIII market - I would
> suggest that the PP curve for current processors minimises somewhere
> around the Celeron 400. For complete systems the story may be
> different. I suggest that, when people make these sorts of
> comparisions, they also bear in mind the price per iteration in terms
> of energy consumption - a slow system built for next to nothing from
> scrap-heap parts will cost just as much to "feed" for a year as a
> fast system bought or built from new parts.
>
Quite true. I appreciate the intent of the people who say 'my 486 has been
doing LL testing for years and it'll keep doing it', but I don't understand
their logic. Well, outside of the US, the situation is different.
Apologies to those who don't have computer shows every month where one can
purchase parts at wholesale.
> Did anyone else see the news story about the PlayStation II?
> Apparently the US government has classified it as "strategic
> ordnance" because its theoretical processing power falls into the
> "supercomputer" range!!!
>
Ha, ha. Maybe they should look at some of the telecommunicaitons equipment.
I know of one card made my motorola that has 15 100MHz 563xx DSPs on it.
Now, before you say, "well, gee, I can get a couple of 550 MHz PIII..." keep
in mind that these chips can do one multiply-accumulate, two data moves, two
address calculations, and a logical operation (plus all data moves give
shifts for 'free') *and* maintain internal and external DMA at full speed.
Consider that the chips add up to a 4.5GB/s *sustained* DSP<>memory
bandwidth, too. You can stuff a cabnet full of 16 of these and hook four
cabinets together. Hmmmm, add that one up. :)
Yeah, the US gov is a little out of date on these things. Distributed
processing essentially made their job of regulating computing power
impossible.
Cheers,
David
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