On 6 May 00, at 22:45, Nathan Russell wrote:
> While running ECM on this exponent I have noticed a throbbing sound,
> somewhat similiar to a ceramic plate being spun on a hard surface; this
> differs from the usual continuous hum of running an LL test. I have read
> the FAQ entries relating to noise, but none of them mention a noise related
> to ECM.
Much more likely to be related to a resonance with the speed at which
the FFT works at the exponent you're testing. ECM will be on a small
exponent (memory requirements!) so the FFT will run very quickly
compared with the same code running on a larger exponent. My guess is
that if you run ECM on an exponent say 30% bigger, or smaller, the
noise will vanish.
>
> In any event, though, I cannot help being somewhat curious about the source
> of the sound. Does it relate to the writing to and from memory?
Probably something loose (maybe inside the processor cartridge) is
excited by an oscillating electric field, causing mechanical
vibration, which can get large enough in amplitude to make itself
obvious by causing contact with a non-moving part if the loose
object's natural frequency is close enough to the frequency of the
driving field.
The cheap & nasty way in which Intel join the heat sink/fan unit into
the processor cartridge proper on their SECC2 processors (cartridge
slot PIIIs) seems to have the potential to resonate seriously. If
you're feeling brave, it would be possible to disassemble this &
refit the heatsink properly, eliminating mechanical sloppiness as
well as getting better thermal contact.
I doubt it's much to do with memory access; for exponents typical for
ECM tests, the transforms will run inside the processor's L2 cache,
maybe even in the L1 cache. Also, the memory loading for ECM is very
different between Stage 1 and Stage 2; if the noise is present during
both stages, we can pretty well rule out memory access as its cause.
Incidentally, this makes processors with 133 MHz FSB particularly
suited to ECM. The point is that, unless you have RDRAM fitted (at
enormous expense), your effective memory bus speed will be 100 MHz -
_even if you have PC133 SDRAM fitted_ - since there is a bottleneck
in the memory subsystem in the VIA Apollo Pro chipset, and also in
the Intel i820 / i840 chipset when a memory translation hub is fitted
to allow the use of SDRAM instead of RDRAM. If you're working from
the L2 cache, the memory bottleneck isn't going to affect you much.
There is still some memory access requirement - more in Stage 2 than
in Stage 1, but still a lot less than the demands of LL testing an
exponent well into 7 figures - but running ECM simply isn't dominated
by memory bus throttling in the same way that LL testing can be.
Regards
Brian Beesley
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