Which brings up something that I just wondered about.

As far as FFT operations go for LL and DC, if some crazy person who had
millions to spend (ie we are talking pure theory here) to hire a chip maker,
could a "coprocessor" be made that specializes in FFT operations? Or do the
optimazations in the code that use SSE2 on P4s pretty much equate to the
same thing?

Or maybe someone has already made such a chip?

----- Original Message -----
From: "Brian J. Beesley" <[EMAIL PROTECTED]>
To: "Justin Valcourt" <[EMAIL PROTECTED]>
Cc: <[EMAIL PROTECTED]>
Sent: Wednesday, February 27, 2002 3:56 AM
Subject: Re: Mersenne: /. article


> On Wednesday 27 February 2002 05:07, you wrote:
>
> > Well anything that can increase the speed of TF by even a wee amount is
> > welcome by me.
>
> Unfortunately there is no impact on trial factoring. The technique
suggested
> is an improvement requiring specialized hardware of a technique which is
only
> effective on numbers which are exceptionally hard to factor. Trial
factoring
> would still be employed to dig out any small factors, as it's a great deal
> more efficient to remove these before resorting to more advanced
techniques.
>
> The specialized hardware can, of course, be emulated in a general-purpose
> computer. The paper is not particularly clear on whether an implementation
of
> the new algorithm would be any more efficient than the existing NFS method
> (which is also defined in terms of specialised hardware) when a
> general-purpose computer emulation is employed. I guess that depends a
great
> deal on the quality of the emulation.
>
> In terms of the work on Mersenne numbers, assuming the theoretical gains
> predicted in the paper can be realized, then the main effects would be:
>
> 1. an increase in the rate at which the NFS people are factoring "awkward"
> Mersenne numbers;
>
> 2. a possible corresponding decrease in the depth to which it's worth
> proceeding using ECM before handing awkward numbers over to the NFS squad.
>
> Regards
> Brian Beesley

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