Module: Mesa Branch: master Commit: 77f08982af8f0807ab489d36a5c137661e10624d URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=77f08982af8f0807ab489d36a5c137661e10624d
Author: Samuel Pitoiset <samuel.pitoi...@gmail.com> Date: Tue May 26 16:21:44 2020 +0200 aco: sign-extend input/identity for 16-bit subgroup ops on GFX6-GFX7 16-bit subgroup ops are implemented with 32-bit instructions on GFX6-GFX7. Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com> Reviewed-by: Rhys Perry <pendingchao...@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5227> --- src/amd/compiler/aco_lower_to_hw_instr.cpp | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/amd/compiler/aco_lower_to_hw_instr.cpp b/src/amd/compiler/aco_lower_to_hw_instr.cpp index df7b571c529..40d466904ef 100644 --- a/src/amd/compiler/aco_lower_to_hw_instr.cpp +++ b/src/amd/compiler/aco_lower_to_hw_instr.cpp @@ -590,6 +590,9 @@ void emit_reduction(lower_context *ctx, aco_opcode op, ReduceOp reduce_op, unsig sdwa->sel[0] = sdwa_uword; sdwa->dst_sel = sdwa_udword; bld.insert(std::move(sdwa)); + } else if (ctx->program->chip_class == GFX6 || ctx->program->chip_class == GFX7) { + bld.vop3(aco_opcode::v_bfe_i32, Definition(PhysReg{tmp}, v1), + Operand(PhysReg{tmp}, v1), Operand(0u), Operand(16u)); } } _______________________________________________ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit