Module: Mesa Branch: master Commit: 981608ad04ce36dec6d1b551cd5bc550b4ca5cb8 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=981608ad04ce36dec6d1b551cd5bc550b4ca5cb8
Author: Connor Abbott <[email protected]> Date: Thu Jul 16 15:48:41 2020 +0200 freedreno/a6xx: Add stencilref register info Found by guessing. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5936> --- src/freedreno/registers/a6xx.xml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/freedreno/registers/a6xx.xml b/src/freedreno/registers/a6xx.xml index 63e8e01058f..2124d8e3a2f 100644 --- a/src/freedreno/registers/a6xx.xml +++ b/src/freedreno/registers/a6xx.xml @@ -2211,7 +2211,7 @@ to upconvert to 32b float internally? <bitfield name="DUAL_COLOR_IN_ENABLE" pos="0" type="boolean"/> <bitfield name="FRAG_WRITES_Z" pos="1" type="boolean"/> <bitfield name="FRAG_WRITES_SAMPMASK" pos="2" type="boolean"/> - <bitfield name="UNK3" pos="3" type="boolean"/> + <bitfield name="FRAG_WRITES_STENCILREF" pos="3" type="boolean"/> </reg32> <reg32 offset="0x880c" name="RB_FS_OUTPUT_CNTL1"> <bitfield name="MRT" low="0" high="3" type="uint"/> @@ -3203,6 +3203,7 @@ to upconvert to 32b float internally? <bitfield name="DUAL_COLOR_IN_ENABLE" pos="0" type="boolean"/> <bitfield name="DEPTH_REGID" low="8" high="15" type="a3xx_regid"/> <bitfield name="SAMPMASK_REGID" low="16" high="23" type="a3xx_regid"/> + <bitfield name="STENCILREF_REGID" low="24" high="31" type="a3xx_regid"/> </reg32> <reg32 offset="0xa98d" name="SP_FS_OUTPUT_CNTL1"> <bitfield name="MRT" low="0" high="3" type="uint"/> _______________________________________________ mesa-commit mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-commit
