Module: Mesa Branch: master Commit: cd78a7a5ff5590bdc3c118e553affd11d9438cf7 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=cd78a7a5ff5590bdc3c118e553affd11d9438cf7
Author: Connor Abbott <[email protected]> Date: Tue Jul 21 10:48:16 2020 +0200 freedreno: Add INDIRECT_COUNT CP_DRAW_INDIRECT_MULTI variants These have an indirect count which is loaded from an iova, and the minimum is taken between the indirect and direct counts. Note, I also had to fix gen_header.py to deal with the extra-long names we get. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6007> --- src/freedreno/registers/adreno_pm4.xml | 14 ++++++++++++++ src/freedreno/registers/gen_header.py | 2 +- 2 files changed, 15 insertions(+), 1 deletion(-) diff --git a/src/freedreno/registers/adreno_pm4.xml b/src/freedreno/registers/adreno_pm4.xml index b33625b7fc0..f16793be5e4 100644 --- a/src/freedreno/registers/adreno_pm4.xml +++ b/src/freedreno/registers/adreno_pm4.xml @@ -794,6 +794,8 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords) <enum name="a6xx_draw_indirect_opcode"> <value name="INDIRECT_OP_NORMAL" value="0x2"/> <value name="INDIRECT_OP_INDEXED" value="0x4"/> + <value name="INDIRECT_OP_INDIRECT_COUNT" value="0x6"/> + <value name="INDIRECT_OP_INDIRECT_COUNT_INDEXED" value="0x7"/> </enum> <reg32 offset="0" name="0" type="vgt_draw_initiator_a4xx"/> <reg32 offset="1" name="1"> @@ -816,6 +818,18 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords) <reg64 offset="6" name="INDIRECT" type="address"/> <reg32 offset="8" name="STRIDE" type="uint"/> </stripe> + <stripe varset="a6xx_draw_indirect_opcode" variants="INDIRECT_OP_INDIRECT_COUNT"> + <reg64 offset="3" name="INDIRECT" type="address"/> + <reg64 offset="5" name="INDIRECT_COUNT" type="address"/> + <reg32 offset="7" name="STRIDE" type="uint"/> + </stripe> + <stripe varset="a6xx_draw_indirect_opcode" variants="INDIRECT_OP_INDIRECT_COUNT_INDEXED"> + <reg64 offset="3" name="INDEX" type="address"/> + <reg32 offset="5" name="MAX_INDICES" type="uint"/> + <reg64 offset="6" name="INDIRECT" type="address"/> + <reg64 offset="8" name="INDIRECT_COUNT" type="address"/> + <reg32 offset="10" name="STRIDE" type="uint"/> + </stripe> </domain> <domain name="CP_SET_DRAW_STATE" width="32" varset="chip" variants="A4XX-"> diff --git a/src/freedreno/registers/gen_header.py b/src/freedreno/registers/gen_header.py index 7e3bcd4f7d8..b8fa8cc0caa 100644 --- a/src/freedreno/registers/gen_header.py +++ b/src/freedreno/registers/gen_header.py @@ -93,7 +93,7 @@ class Field(object): def tab_to(name, value): tab_count = (68 - (len(name) & ~7)) // 8 - if tab_count == 0: + if tab_count <= 0: tab_count = 1 print(name + ('\t' * tab_count) + value) _______________________________________________ mesa-commit mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-commit
