Module: Mesa Branch: master Commit: d887eb141bd46f499c83bc624593e4cd2007fd6e URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d887eb141bd46f499c83bc624593e4cd2007fd6e
Author: Daniel Schürmann <[email protected]> Date: Fri Sep 18 00:00:38 2020 +0100 aco: propagate SGPRs into VOP1 instructions early. This helps DCE. We should reconsider our optimization order or maybe do the dead code analysis twice Totals from 106 (0.08% of 136546) affected shaders (RAVEN): SGPRs: 7184 -> 7152 (-0.45%) CodeSize: 736912 -> 736052 (-0.12%) Instrs: 145739 -> 145509 (-0.16%) Cycles: 2085344 -> 2084268 (-0.05%) VMEM: 14819 -> 14807 (-0.08%) SMEM: 7109 -> 7100 (-0.13%); split: +0.04%, -0.17% SClause: 5383 -> 5385 (+0.04%) Copies: 13290 -> 13189 (-0.76%) PreSGPRs: 5265 -> 5221 (-0.84%) Reviewed-by: Rhys Perry <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6777> --- src/amd/compiler/aco_optimizer.cpp | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/src/amd/compiler/aco_optimizer.cpp b/src/amd/compiler/aco_optimizer.cpp index a2640bd7220..1b8674a1765 100644 --- a/src/amd/compiler/aco_optimizer.cpp +++ b/src/amd/compiler/aco_optimizer.cpp @@ -877,6 +877,11 @@ void label_instruction(opt_ctx &ctx, Block& block, aco_ptr<Instruction>& instr) instr->operands[i].setTemp(info.temp); info = ctx.info[info.temp.id()]; } + /* applying SGPRs to VOP1 doesn't increase code size and DCE is helped by doing it earlier */ + if (info.is_temp() && info.temp.type() == RegType::sgpr && can_apply_sgprs(instr) && instr->operands.size() == 1) { + instr->operands[i].setTemp(info.temp); + info = ctx.info[info.temp.id()]; + } /* for instructions other than v_cndmask_b32, the size of the instruction should match the operand size */ unsigned can_use_mod = instr->opcode != aco_opcode::v_cndmask_b32 || instr->operands[i].getTemp().bytes() == 4; _______________________________________________ mesa-commit mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-commit
