Module: Mesa Branch: master Commit: 8457be149726c08389dd1acf69c3272a2b6db37a URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8457be149726c08389dd1acf69c3272a2b6db37a
Author: Vinson Lee <[email protected]> Date: Thu Dec 31 18:01:10 2020 -0800 radeonsi: Fix typos. Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Zoltán Böszörményi <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8289> --- src/gallium/drivers/radeonsi/si_clear.c | 4 ++-- src/gallium/drivers/radeonsi/si_compute_prim_discard.c | 2 +- src/gallium/drivers/radeonsi/si_descriptors.c | 2 +- src/gallium/drivers/radeonsi/si_pipe.c | 2 +- src/gallium/drivers/radeonsi/si_pipe.h | 2 +- src/gallium/drivers/radeonsi/si_shader_llvm_tess.c | 2 +- src/gallium/drivers/radeonsi/si_state.c | 2 +- src/gallium/drivers/radeonsi/si_state_draw.cpp | 2 +- src/gallium/drivers/radeonsi/si_texture.c | 2 +- 9 files changed, 10 insertions(+), 10 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_clear.c b/src/gallium/drivers/radeonsi/si_clear.c index ced753f023d..fe2cac59588 100644 --- a/src/gallium/drivers/radeonsi/si_clear.c +++ b/src/gallium/drivers/radeonsi/si_clear.c @@ -80,7 +80,7 @@ static bool si_set_clear_color(struct si_texture *tex, enum pipe_format surface_ return true; } -/** Linearize and convert luminace/intensity to red. */ +/** Linearize and convert luminance/intensity to red. */ enum pipe_format si_simplify_cb_format(enum pipe_format format) { format = util_format_linear(format); @@ -494,7 +494,7 @@ static void si_do_fast_color_clear(struct si_context *sctx, unsigned *buffers, if (too_small) continue; - /* 128-bit formats are unusupported */ + /* 128-bit formats are unsupported */ if (tex->surface.bpe > 8) { continue; } diff --git a/src/gallium/drivers/radeonsi/si_compute_prim_discard.c b/src/gallium/drivers/radeonsi/si_compute_prim_discard.c index 2a911e2696a..159bd852aed 100644 --- a/src/gallium/drivers/radeonsi/si_compute_prim_discard.c +++ b/src/gallium/drivers/radeonsi/si_compute_prim_discard.c @@ -539,7 +539,7 @@ void si_build_prim_discard_compute_shader(struct si_shader_context *ctx) LLVMValueRef strip_start = ac_build_umsb(&ctx->ac, preceding_reset_threadmask, NULL); strip_start = LLVMBuildAdd(builder, strip_start, ctx->ac.i32_1, ""); - /* This flips the orientatino based on reset indices within this wave only. */ + /* This flips the orientation based on reset indices within this wave only. */ first_is_odd = LLVMBuildTrunc(builder, strip_start, ctx->ac.i1, ""); LLVMValueRef last_strip_start, prev_wave_state, ret, tmp; diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c index ec3ee50597e..c54a58ace86 100644 --- a/src/gallium/drivers/radeonsi/si_descriptors.c +++ b/src/gallium/drivers/radeonsi/si_descriptors.c @@ -30,7 +30,7 @@ * descriptors in CPU memory and re-uploads a whole list if some slots have * been changed. * - * This code is also reponsible for updating shader pointers to those lists. + * This code is also responsible for updating shader pointers to those lists. * * Note that CP DMA can't be used for updating the lists, because a GPU hang * could leave the list in a mid-IB state and the next IB would get wrong diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index fec3197b705..61508c27184 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.c +++ b/src/gallium/drivers/radeonsi/si_pipe.c @@ -656,7 +656,7 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen, unsign * evenly between CUs. The number is only a function of the number of CUs. * We can decrease the constant to decrease the scratch buffer size. * - * sctx->scratch_waves must be >= the maximum posible size of + * sctx->scratch_waves must be >= the maximum possible size of * 1 threadgroup, so that the hw doesn't hang from being unable * to start any. * diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h index a8429b67c4a..0a999d5e948 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.h +++ b/src/gallium/drivers/radeonsi/si_pipe.h @@ -297,7 +297,7 @@ struct si_resource { * streamout, DMA, or as a random access target). The rest of * the buffer is considered invalid and can be mapped unsynchronized. * - * This allows unsychronized mapping of a buffer range which hasn't + * This allows unsynchronized mapping of a buffer range which hasn't * been used yet. It's for applications which forget to use * the unsynchronized map flag and expect the driver to figure it out. */ diff --git a/src/gallium/drivers/radeonsi/si_shader_llvm_tess.c b/src/gallium/drivers/radeonsi/si_shader_llvm_tess.c index 4e7f4a0d413..6862e7f8bae 100644 --- a/src/gallium/drivers/radeonsi/si_shader_llvm_tess.c +++ b/src/gallium/drivers/radeonsi/si_shader_llvm_tess.c @@ -460,7 +460,7 @@ static LLVMValueRef si_nir_load_input_tes(struct ac_shader_abi *abi, LLVMTypeRef get_tcs_tes_buffer_address_from_generic_indices(ctx, vertex_index, param_index, semantic); /* TODO: This will generate rather ordinary llvm code, although it - * should be easy for the optimiser to fix up. In future we might want + * should be easy for the optimizer to fix up. In future we might want * to refactor buffer_load(). */ LLVMValueRef value[4]; diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index 391c242f094..427956f5b27 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -1041,7 +1041,7 @@ static void si_delete_rs_state(struct pipe_context *ctx, void *state) } /* - * infeered state between dsa and stencil ref + * inferred state between dsa and stencil ref */ static void si_emit_stencil_ref(struct si_context *sctx) { diff --git a/src/gallium/drivers/radeonsi/si_state_draw.cpp b/src/gallium/drivers/radeonsi/si_state_draw.cpp index 60acfda75ce..e51dde169f0 100644 --- a/src/gallium/drivers/radeonsi/si_state_draw.cpp +++ b/src/gallium/drivers/radeonsi/si_state_draw.cpp @@ -1167,7 +1167,7 @@ void si_prim_discard_signal_next_compute_ib_start(struct si_context *sctx) sctx->last_pkt3_write_data = &sctx->gfx_cs.current.buf[sctx->gfx_cs.current.cdw - 5]; - /* Only the last occurence of WRITE_DATA will be executed. + /* Only the last occurrence of WRITE_DATA will be executed. * The packet will be enabled in si_flush_gfx_cs. */ *sctx->last_pkt3_write_data = PKT3(PKT3_NOP, 3, 0); diff --git a/src/gallium/drivers/radeonsi/si_texture.c b/src/gallium/drivers/radeonsi/si_texture.c index 68187f5e436..e89f1883a60 100644 --- a/src/gallium/drivers/radeonsi/si_texture.c +++ b/src/gallium/drivers/radeonsi/si_texture.c @@ -1506,7 +1506,7 @@ static struct pipe_resource *si_texture_from_winsys_buffer(struct si_screen *ssc * surface pitch isn't correctly aligned by default. * * In order to support it correctly we require multi-image - * metadata to be syncrhonized between radv and radeonsi. The + * metadata to be synchronized between radv and radeonsi. The * semantics of associating multiple image metadata to a memory * object on the vulkan export side are not concretely defined * either. _______________________________________________ mesa-commit mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-commit
