Module: Mesa Branch: master Commit: 3c1275ccae620888108206799403999c1fc7e8b3 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3c1275ccae620888108206799403999c1fc7e8b3
Author: Samuel Pitoiset <[email protected]> Date: Tue Jan 5 16:47:17 2021 +0100 radv: enable DCC for MSAA on GFX10+ It should work fine now. This gives +1-2% improvements with Control MSAA (2x and 4x) on Sienna. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8413> --- src/amd/vulkan/radv_image.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index 1573b3edc2e..90409792089 100644 --- a/src/amd/vulkan/radv_image.c +++ b/src/amd/vulkan/radv_image.c @@ -193,12 +193,10 @@ radv_use_dcc_for_image(struct radv_device *device, if (pCreateInfo->arrayLayers > 1 && pCreateInfo->mipLevels > 1) return false; - /* FIXME: DCC for MSAA with 4x and 8x samples doesn't work yet, while - * 2x can be enabled with an option. - */ - if (pCreateInfo->samples > 2 || - (pCreateInfo->samples == 2 && - !device->physical_device->dcc_msaa_allowed)) + /* TODO: Fix and enable DCC MSAA on older chips. */ + if (pCreateInfo->samples > 1 && + !device->physical_device->dcc_msaa_allowed && + device->physical_device->rad_info.chip_class < GFX10) return false; /* Determine if the formats are DCC compatible. */ _______________________________________________ mesa-commit mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-commit
