Module: Mesa
Branch: master
Commit: 381d3a5a38635ce8717c81e8e967450c2f623f0a
URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=381d3a5a38635ce8717c81e8e967450c2f623f0a

Author: James Zhu <[email protected]>
Date:   Wed Dec 16 09:49:18 2020 -0500

amd: add Aldebaran chip enum

Signed-off-by: James Zhu <[email protected]>
Reviewed-by: Leo Liu <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9389>

---

 src/amd/addrlib/src/amdgpu_asic_addr.h      | 4 +++-
 src/amd/common/ac_gpu_info.c                | 2 ++
 src/amd/common/amd_family.h                 | 1 +
 src/amd/llvm/ac_llvm_util.c                 | 2 ++
 src/gallium/drivers/radeon/radeon_vcn_dec.c | 1 +
 5 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/src/amd/addrlib/src/amdgpu_asic_addr.h 
b/src/amd/addrlib/src/amdgpu_asic_addr.h
index 02b241e4fdb..88dcfbdc44b 100644
--- a/src/amd/addrlib/src/amdgpu_asic_addr.h
+++ b/src/amd/addrlib/src/amdgpu_asic_addr.h
@@ -89,7 +89,8 @@
 #define AMDGPU_VEGA10_RANGE     0x01, 0x14
 #define AMDGPU_VEGA12_RANGE     0x14, 0x28
 #define AMDGPU_VEGA20_RANGE     0x28, 0x32
-#define AMDGPU_ARCTURUS_RANGE   0x32, 0xFF
+#define AMDGPU_ARCTURUS_RANGE   0x32, 0x3C
+#define AMDGPU_ALDEBARAN_RANGE  0x3C, 0xFF
 
 #define AMDGPU_RAVEN_RANGE      0x01, 0x81
 #define AMDGPU_RAVEN2_RANGE     0x81, 0x91
@@ -143,6 +144,7 @@
 #define ASICREV_IS_VEGA12_p(r)         ASICREV_IS(r, VEGA12)
 #define ASICREV_IS_VEGA20_P(r)         ASICREV_IS(r, VEGA20)
 #define ASICREV_IS_ARCTURUS(r)         ASICREV_IS(r, ARCTURUS)
+#define ASICREV_IS_ALDEBARAN(r)        ASICREV_IS(r, ALDEBARAN)
 
 #define ASICREV_IS_RAVEN(r)            ASICREV_IS(r, RAVEN)
 #define ASICREV_IS_RAVEN2(r)           ASICREV_IS(r, RAVEN2)
diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c
index 53157c4f512..8a98056dd02 100644
--- a/src/amd/common/ac_gpu_info.c
+++ b/src/amd/common/ac_gpu_info.c
@@ -531,6 +531,7 @@ bool ac_query_gpu_info(int fd, void *dev_p, struct 
radeon_info *info,
       identify_chip(VEGA12);
       identify_chip(VEGA20);
       identify_chip(ARCTURUS);
+      identify_chip(ALDEBARAN);
       break;
    case FAMILY_RV:
       identify_chip(RAVEN);
@@ -913,6 +914,7 @@ bool ac_query_gpu_info(int fd, void *dev_p, struct 
radeon_info *info,
          pc_lines = 256;
          break;
       case CHIP_ARCTURUS:
+      case CHIP_ALDEBARAN:
          break;
       default:
          assert(0);
diff --git a/src/amd/common/amd_family.h b/src/amd/common/amd_family.h
index 131730837e2..eff25221db3 100644
--- a/src/amd/common/amd_family.h
+++ b/src/amd/common/amd_family.h
@@ -100,6 +100,7 @@ enum radeon_family
    CHIP_RAVEN2,
    CHIP_RENOIR,
    CHIP_ARCTURUS,
+   CHIP_ALDEBARAN,
    CHIP_NAVI10,
    CHIP_NAVI12,
    CHIP_NAVI14,
diff --git a/src/amd/llvm/ac_llvm_util.c b/src/amd/llvm/ac_llvm_util.c
index 503b19c245e..d104b29a278 100644
--- a/src/amd/llvm/ac_llvm_util.c
+++ b/src/amd/llvm/ac_llvm_util.c
@@ -168,6 +168,8 @@ const char *ac_get_llvm_processor_name(enum radeon_family 
family)
       return "gfx909";
    case CHIP_ARCTURUS:
       return "gfx908";
+   case CHIP_ALDEBARAN:
+      return "gfx90a";
    case CHIP_NAVI10:
       return "gfx1010";
    case CHIP_NAVI12:
diff --git a/src/gallium/drivers/radeon/radeon_vcn_dec.c 
b/src/gallium/drivers/radeon/radeon_vcn_dec.c
index 02e141ac9e5..064d2ede813 100644
--- a/src/gallium/drivers/radeon/radeon_vcn_dec.c
+++ b/src/gallium/drivers/radeon/radeon_vcn_dec.c
@@ -2446,6 +2446,7 @@ struct pipe_video_codec *radeon_create_decoder(struct 
pipe_context *context,
       dec->jpg.direct_reg = true;
       break;
    case CHIP_ARCTURUS:
+   case CHIP_ALDEBARAN:
    case CHIP_SIENNA_CICHLID:
    case CHIP_NAVY_FLOUNDER:
    case CHIP_DIMGREY_CAVEFISH:

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