Module: Mesa Branch: master Commit: 33b2daab1a15c6acd61f110756ce7b90f4d8f645 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=33b2daab1a15c6acd61f110756ce7b90f4d8f645
Author: Lionel Landwerlin <[email protected]> Date: Fri Mar 19 11:09:56 2021 +0200 intel/compiler: lower bit sizes in NIR postprocessing It appears that between preprocess & postprocess some descriptor lowering introduces 8bit types in the shader, so run the lower bit size again to make sure we don't have any unsupported types in our shader. Signed-off-by: Lionel Landwerlin <[email protected]> Fixes: e06144a818950e ("anv: Use 64bit_global_32bit_offset for SSBOs") Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4478 Reviewed-by: Jason Ekstrand <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9705> --- src/intel/compiler/brw_nir.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c index cfa2b1b23b9..c45344cdc8a 100644 --- a/src/intel/compiler/brw_nir.c +++ b/src/intel/compiler/brw_nir.c @@ -1083,6 +1083,8 @@ brw_postprocess_nir(nir_shader *nir, const struct brw_compiler *compiler, UNUSED bool progress; /* Written by OPT */ + OPT(nir_lower_bit_size, lower_bit_size_callback, (void *)compiler); + OPT(brw_nir_lower_scoped_barriers); OPT(nir_opt_combine_memory_barriers, combine_all_barriers, NULL); _______________________________________________ mesa-commit mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-commit
