Module: Mesa Branch: master Commit: d4db68b338a9c6b009fa9d9fa05e13ce0215861b URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d4db68b338a9c6b009fa9d9fa05e13ce0215861b
Author: Samuel Pitoiset <[email protected]> Date: Tue Apr 6 08:50:34 2021 +0200 radv: enable DCC stores with MSAA 4x/8x on GFX10+ Should work now. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10052> --- src/amd/vulkan/radv_image.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index 44963dd308b..b8d0590a80f 100644 --- a/src/amd/vulkan/radv_image.c +++ b/src/amd/vulkan/radv_image.c @@ -291,14 +291,11 @@ bool radv_image_use_dcc_image_stores(const struct radv_device *device, * TODO: Enable on more HW. DIMGREY and VANGOGH need a workaround and * we need more perf analysis. * https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6796#note_643853 - * - * DCC with MSAA > 2 samples results in CTS failures (some of dEQP-VK.pipeline.multisample.storage_image.*). */ - return (device->physical_device->rad_info.chip_class == GFX10 || + return device->physical_device->rad_info.chip_class == GFX10 || (device->physical_device->rad_info.chip_class == GFX10_3 && (device->instance->perftest_flags & RADV_PERFTEST_DCC_STORES) && - !device->physical_device->use_llvm)) && - image->info.samples <= 2; + !device->physical_device->use_llvm); } /* _______________________________________________ mesa-commit mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-commit
