Module: Mesa Branch: master Commit: 22a0029a68cf6a17e5d799c7d8eb8a699ccdeabb URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=22a0029a68cf6a17e5d799c7d8eb8a699ccdeabb
Author: Andre Maasikas <[email protected]> Date: Thu Oct 15 11:24:49 2009 -0400 r600: fix tfp1 bo size Setting the wrong bo size resulting in an incomplete read cache flush when reading the texture. This fixes the compiz text corruption. [agd5f: take hw pitch alignment into account] --- src/mesa/drivers/dri/r600/r600_texstate.c | 8 ++++++-- 1 files changed, 6 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/r600/r600_texstate.c b/src/mesa/drivers/dri/r600/r600_texstate.c index bcb8d7c..61ff7e8 100644 --- a/src/mesa/drivers/dri/r600/r600_texstate.c +++ b/src/mesa/drivers/dri/r600/r600_texstate.c @@ -721,7 +721,9 @@ void r600SetTexOffset(__DRIcontext * pDRICtx, GLint texname, struct gl_texture_object *tObj = _mesa_lookup_texture(rmesa->radeon.glCtx, texname); radeonTexObjPtr t = radeon_tex_obj(tObj); - uint32_t pitch_val, size; + int firstlevel = t->mt ? t->mt->firstLevel : 0; + const struct gl_texture_image *firstImage; + uint32_t pitch_val, size, row_align; if (!tObj) return; @@ -731,7 +733,9 @@ void r600SetTexOffset(__DRIcontext * pDRICtx, GLint texname, if (!offset) return; - size = pitch;//h * w * (depth / 8); + firstImage = t->base.Image[0][firstlevel]; + row_align = rmesa->radeon.texture_row_align - 1; + size = ((firstImage->Width * (depth / 8) + row_align) & ~row_align) * firstImage->Height; if (t->bo) { radeon_bo_unref(t->bo); t->bo = NULL; _______________________________________________ mesa-commit mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/mesa-commit
