Module: Mesa Branch: master Commit: c05e48308b432f93785520f48fbddc813040b11d URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c05e48308b432f93785520f48fbddc813040b11d
Author: Bas Nieuwenhuizen <[email protected]> Date: Tue May 4 23:34:42 2021 +0000 radeon/vcn: Use the correct pitch for chroma surface. The pitch of the chroma plane isn't necessarily half that of the luma plane, as tiling (and presumably even linear) swizzle modes apply some alignment. Fixes: 35e25ea1d07 ("ac/surface: allow non-DCC modifiers for YUV on GFX9+") Reviewed-by: James Zhu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10638> --- src/gallium/drivers/radeon/radeon_vcn_dec.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/radeon/radeon_vcn_dec.c b/src/gallium/drivers/radeon/radeon_vcn_dec.c index 310eb9aadf6..569f57d4e57 100644 --- a/src/gallium/drivers/radeon/radeon_vcn_dec.c +++ b/src/gallium/drivers/radeon/radeon_vcn_dec.c @@ -1649,7 +1649,7 @@ static struct pb_buffer *rvcn_dec_message_decode(struct radeon_decoder *dec, decode->db_surf_tile_config = 0; decode->dt_pitch = luma->surface.u.gfx9.surf_pitch * luma->surface.blk_w; - decode->dt_uv_pitch = decode->dt_pitch / 2; + decode->dt_uv_pitch = chroma->surface.u.gfx9.surf_pitch * chroma->surface.blk_w; if (luma->surface.meta_offset) { RVID_ERR("DCC surfaces not supported.\n"); @@ -1675,7 +1675,7 @@ static struct pb_buffer *rvcn_dec_message_decode(struct radeon_decoder *dec, decode->dt_chroma_bottom_offset = decode->dt_chroma_top_offset; } if (dec->stream_type == RDECODE_CODEC_AV1) - decode->db_pitch_uv = decode->db_pitch / 2; + decode->db_pitch_uv = chroma->surface.u.gfx9.surf_pitch * chroma->surface.blk_w; if (encrypted) { assert(sscreen->info.has_tmz_support); _______________________________________________ mesa-commit mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-commit
