Module: Mesa Branch: main Commit: b308ccf4fb902755e5c301251607ab9c5d694bf0 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b308ccf4fb902755e5c301251607ab9c5d694bf0
Author: Rob Clark <[email protected]> Date: Sat Sep 18 09:35:37 2021 -0700 freedreno/ir3: Fix generation check Fixes: fb5deb2b4a0 ("a4xx/computerator: add initial backend") Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12923> --- src/freedreno/ir3/ir3_parser.y | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/freedreno/ir3/ir3_parser.y b/src/freedreno/ir3/ir3_parser.y index 8271a3f87d5..3be8fa0426b 100644 --- a/src/freedreno/ir3/ir3_parser.y +++ b/src/freedreno/ir3/ir3_parser.y @@ -698,14 +698,14 @@ invocationid_header: T_A_INVOCATIONID '(' T_REGISTER ')' { wgid_header: T_A_WGID '(' T_REGISTER ')' { assert(($3 & 0x1) == 0); /* half-reg not allowed */ unsigned reg = $3 >> 1; - assert(variant->shader->compiler->gen >= 500); + assert(variant->shader->compiler->gen >= 5); assert(reg >= regid(48, 0)); /* must be a high reg */ add_sysval(reg, 0x7, SYSTEM_VALUE_WORKGROUP_ID); } | T_A_WGID '(' T_CONSTANT ')' { assert(($3 & 0x1) == 0); /* half-reg not allowed */ unsigned reg = $3 >> 1; - assert(variant->shader->compiler->gen < 500); + assert(variant->shader->compiler->gen < 5); info->wgid = reg; } @@ -714,7 +714,7 @@ numwg_header: T_A_NUMWG '(' T_CONSTANT ')' { unsigned reg = $3 >> 1; info->numwg = reg; /* reserve space in immediates for the actual value to be plugged in later: */ - if (variant->shader->compiler->gen >= 500) + if (variant->shader->compiler->gen >= 5) add_const($3, 0, 0, 0, 0); }
