Module: Mesa Branch: main Commit: bff052d6f54150e70db02c618415573eaba3545e URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=bff052d6f54150e70db02c618415573eaba3545e
Author: Samuel Pitoiset <[email protected]> Date: Mon Sep 27 14:35:54 2021 +0200 radv: remove vs_common_out:export_prim_id Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timur Kristóf <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13062> --- src/amd/vulkan/radv_pipeline.c | 19 ++++++++++++------- src/amd/vulkan/radv_shader.c | 12 ++++++++++-- src/amd/vulkan/radv_shader.h | 1 - src/amd/vulkan/radv_shader_info.c | 13 ------------- 4 files changed, 22 insertions(+), 23 deletions(-) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index d80dc9a3700..9e2f610c62c 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -2865,22 +2865,27 @@ radv_fill_shader_info(struct radv_pipeline *pipeline, radv_nir_shader_info_pass(pipeline->device, nir[MESA_SHADER_FRAGMENT], pipeline->layout, &keys[MESA_SHADER_FRAGMENT], &infos[MESA_SHADER_FRAGMENT]); + assert(pipeline->graphics.last_vgt_api_stage != MESA_SHADER_NONE); + if (infos[MESA_SHADER_FRAGMENT].ps.prim_id_input) { + if (pipeline->graphics.last_vgt_api_stage == MESA_SHADER_VERTEX) { + infos[MESA_SHADER_VERTEX].vs.outinfo.export_prim_id = true; + } else if (pipeline->graphics.last_vgt_api_stage == MESA_SHADER_TESS_EVAL) { + infos[MESA_SHADER_TESS_EVAL].tes.outinfo.export_prim_id = true; + } else { + assert(pipeline->graphics.last_vgt_api_stage == MESA_SHADER_GEOMETRY); + } + } + /* TODO: These are no longer used as keys we should refactor this */ - keys[MESA_SHADER_VERTEX].vs_common_out.export_prim_id = - infos[MESA_SHADER_FRAGMENT].ps.prim_id_input; keys[MESA_SHADER_VERTEX].vs_common_out.export_clip_dists = !!infos[MESA_SHADER_FRAGMENT].ps.num_input_clips_culls; - keys[MESA_SHADER_TESS_EVAL].vs_common_out.export_prim_id = - infos[MESA_SHADER_FRAGMENT].ps.prim_id_input; keys[MESA_SHADER_TESS_EVAL].vs_common_out.export_clip_dists = !!infos[MESA_SHADER_FRAGMENT].ps.num_input_clips_culls; /* NGG passthrough mode can't be enabled for vertex shaders * that export the primitive ID. - * - * TODO: I should really refactor the keys logic. */ - if (nir[MESA_SHADER_VERTEX] && keys[MESA_SHADER_VERTEX].vs_common_out.export_prim_id) { + if (nir[MESA_SHADER_VERTEX] && infos[MESA_SHADER_VERTEX].vs.outinfo.export_prim_id) { keys[MESA_SHADER_VERTEX].vs_common_out.as_ngg_passthrough = false; } diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c index 1516060aa69..f1f1ba12b7b 100644 --- a/src/amd/vulkan/radv_shader.c +++ b/src/amd/vulkan/radv_shader.c @@ -943,7 +943,7 @@ void radv_lower_ngg(struct radv_device *device, struct nir_shader *nir, num_vertices_per_prim = 2; /* Manually mark the primitive ID used, so the shader can repack it. */ - if (key->vs_common_out.export_prim_id) + if (info->tes.outinfo.export_prim_id) BITSET_SET(nir->info.system_values_read, SYSTEM_VALUE_PRIMITIVE_ID); } else if (nir->info.stage == MESA_SHADER_VERTEX) { @@ -965,11 +965,19 @@ void radv_lower_ngg(struct radv_device *device, struct nir_shader *nir, if (nir->info.stage == MESA_SHADER_VERTEX || nir->info.stage == MESA_SHADER_TESS_EVAL) { + bool export_prim_id; + assert(key->vs_common_out.as_ngg); if (consider_culling) radv_optimize_nir_algebraic(nir, false); + if (nir->info.stage == MESA_SHADER_VERTEX) { + export_prim_id = info->vs.outinfo.export_prim_id; + } else { + export_prim_id = info->tes.outinfo.export_prim_id; + } + out_conf = ac_nir_lower_ngg_nogs( nir, @@ -979,7 +987,7 @@ void radv_lower_ngg(struct radv_device *device, struct nir_shader *nir, info->wave_size, consider_culling, key->vs_common_out.as_ngg_passthrough, - key->vs_common_out.export_prim_id, + export_prim_id, key->vs.provoking_vtx_last, false, key->vs.instance_rate_inputs); diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h index 42076e553d4..d6159dfebc6 100644 --- a/src/amd/vulkan/radv_shader.h +++ b/src/amd/vulkan/radv_shader.h @@ -52,7 +52,6 @@ struct radv_vs_out_key { uint32_t as_ls : 1; uint32_t as_ngg : 1; uint32_t as_ngg_passthrough : 1; - uint32_t export_prim_id : 1; uint32_t export_clip_dists : 1; }; diff --git a/src/amd/vulkan/radv_shader_info.c b/src/amd/vulkan/radv_shader_info.c index 7b0c6eb02cc..a6d28942087 100644 --- a/src/amd/vulkan/radv_shader_info.c +++ b/src/amd/vulkan/radv_shader_info.c @@ -603,19 +603,6 @@ radv_nir_shader_info_pass(struct radv_device *device, const struct nir_shader *n } } - /* Make sure to export the PrimitiveID if the fragment shader needs it. */ - if (key->vs_common_out.export_prim_id) { - switch (nir->info.stage) { - case MESA_SHADER_VERTEX: - info->vs.outinfo.export_prim_id = true; - break; - case MESA_SHADER_TESS_EVAL: - info->tes.outinfo.export_prim_id = true; - break; - default: - break; - } - } /* Make sure to export the clip/cull distances if the fragment shader needs it. */ if (key->vs_common_out.export_clip_dists) {
