Module: Mesa Branch: main Commit: 78337728d1d53214e05a0733bc8745587b2a5d3c URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=78337728d1d53214e05a0733bc8745587b2a5d3c
Author: Marek Olšák <[email protected]> Date: Thu Nov 4 09:23:55 2021 -0400 radeonsi: set correct point and line limits Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13676> --- src/gallium/drivers/radeonsi/si_get.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_get.c b/src/gallium/drivers/radeonsi/si_get.c index 82a118529e6..88a7084ae6e 100644 --- a/src/gallium/drivers/radeonsi/si_get.c +++ b/src/gallium/drivers/radeonsi/si_get.c @@ -356,12 +356,12 @@ static float si_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param) switch (param) { case PIPE_CAPF_MIN_LINE_WIDTH: case PIPE_CAPF_MIN_LINE_WIDTH_AA: + return 1; /* due to axis-aligned end caps at line width 1 */ case PIPE_CAPF_MIN_POINT_SIZE: case PIPE_CAPF_MIN_POINT_SIZE_AA: - return 1; case PIPE_CAPF_POINT_SIZE_GRANULARITY: case PIPE_CAPF_LINE_WIDTH_GRANULARITY: - return 0.1; + return 1.0 / 8.0; /* due to the register field precision */ case PIPE_CAPF_MAX_LINE_WIDTH: case PIPE_CAPF_MAX_LINE_WIDTH_AA: /* This depends on the quant mode, though the precise interactions
