Module: Mesa Branch: main Commit: 8df1b42eb0387f133746e4f4bb22147a6b3c980e URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8df1b42eb0387f133746e4f4bb22147a6b3c980e
Author: Alyssa Rosenzweig <[email protected]> Date: Wed Dec 22 12:14:59 2021 -0500 pan/va: Add .signed bit to right shift instructions This makes the RSHIFT_* family of instructions act like ARSHIFT.* on Bifrost. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14292> --- src/panfrost/bifrost/valhall/ISA.xml | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/src/panfrost/bifrost/valhall/ISA.xml b/src/panfrost/bifrost/valhall/ISA.xml index d5022a8531a..c4ffa073c4e 100644 --- a/src/panfrost/bifrost/valhall/ISA.xml +++ b/src/panfrost/bifrost/valhall/ISA.xml @@ -1578,8 +1578,11 @@ <mod name="left" start="128" size="1" implied="true"/> <desc> Right shifts its first source by a specified amount and bitwise ANDs it with the - second source, optionally inverting the second source or the result. + second source, optionally inverting the second source or the result. If + `signed` is set, the hardware performs an arithmetic right shift; otherwise, + it performs an unsigned right shift. </desc> + <mod name="signed" start="34" size="1"/> <not_result/> <src widen="true">A</src> <src lanes="true" size="8">shift</src> @@ -1610,8 +1613,11 @@ <mod name="left" start="128" size="1" implied="true"/> <desc> Right shifts its first source by a specified amount and bitwise ORs it with the - second source, optionally inverting the second source or the result. - </desc> + second source, optionally inverting the second source or the result. If + `signed` is set, the hardware performs an arithmetic right shift; otherwise, + it performs an unsigned right shift. + </desc> + <mod name="signed" start="34" size="1"/> <not_result/> <src widen="true">A</src> <src lanes="true" size="8">shift</src> @@ -1642,8 +1648,11 @@ <mod name="left" start="128" size="1" implied="true"/> <desc> Right shifts its first source by a specified amount and bitwise XORs it with the - second source, optionally inverting the second source or the result. + second source, optionally inverting the second source or the result. If + `signed` is set, the hardware performs an arithmetic right shift; otherwise, + it performs an unsigned right shift. </desc> + <mod name="signed" start="34" size="1"/> <not_result/> <src widen="true">A</src> <src lanes="true" size="8">shift</src>
