Module: Mesa Branch: main Commit: 562f7eef5b4f5a4d4fb4d93418e6373e853550fa URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=562f7eef5b4f5a4d4fb4d93418e6373e853550fa
Author: Tapani Pälli <[email protected]> Date: Mon Jan 31 11:52:21 2022 +0200 iris: invalidate L3 read only cache when VF cache is invalidated When enabling the caching of index,vertex data in the L3 RO Cache (L3BypassDisable), we need to use L3ReadOnlyCacheInvalidationEnable to invalidate cache when buffer is modified by CPU/GPU. Ref: bspec 46314 Fixes: ed8f2c4cbee ("iris: Cache VB/IB in L3$ for Gen12") Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14815> --- src/gallium/drivers/iris/iris_state.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c index fafa7c3a77b..a8b88be935c 100644 --- a/src/gallium/drivers/iris/iris_state.c +++ b/src/gallium/drivers/iris/iris_state.c @@ -8057,6 +8057,13 @@ iris_emit_raw_pipe_control(struct iris_batch *batch, pc.DepthCacheFlushEnable = flags & PIPE_CONTROL_DEPTH_CACHE_FLUSH; pc.StateCacheInvalidationEnable = flags & PIPE_CONTROL_STATE_CACHE_INVALIDATE; +#if GFX_VER >= 12 + /* Invalidates the L3 cache part in which index & vertex data is loaded + * when VERTEX_BUFFER_STATE::L3BypassDisable is set. + */ + pc.L3ReadOnlyCacheInvalidationEnable = + flags & PIPE_CONTROL_VF_CACHE_INVALIDATE; +#endif pc.VFCacheInvalidationEnable = flags & PIPE_CONTROL_VF_CACHE_INVALIDATE; pc.ConstantCacheInvalidationEnable = flags & PIPE_CONTROL_CONST_CACHE_INVALIDATE;
