Module: Mesa Branch: main Commit: b219e9a96e443557052a7844df48747e5745b5d7 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b219e9a96e443557052a7844df48747e5745b5d7
Author: Alyssa Rosenzweig <[email protected]> Date: Sun Mar 20 21:03:00 2022 -0400 asahi: Port driver to macOS 12.x ABI There's lots of reshuffling required. Nothing "interesting", though. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15482> --- src/asahi/lib/agx_device.c | 4 +- src/asahi/lib/cmdbuf.xml | 113 ++++++++++++++++++++------------------ src/asahi/lib/decode.c | 16 ++++-- src/asahi/lib/io.h | 10 +++- src/gallium/drivers/asahi/magic.c | 41 +++++++------- 5 files changed, 97 insertions(+), 87 deletions(-) diff --git a/src/asahi/lib/agx_device.c b/src/asahi/lib/agx_device.c index 7dd0ca603e1..30efa97a236 100644 --- a/src/asahi/lib/agx_device.c +++ b/src/asahi/lib/agx_device.c @@ -426,7 +426,7 @@ agx_create_command_queue(struct agx_device *dev) }; ASSERTED kern_return_t ret = IOConnectCallScalarMethod(dev->fd, - 0x29, + 0x31, scalars, 2, NULL, NULL); assert(ret == 0); @@ -455,8 +455,6 @@ agx_submit_cmdbuf(struct agx_device *dev, unsigned cmdbuf, unsigned mappings, ui .unk3 = 0x1, }; - assert(sizeof(req) == 40); - ASSERTED kern_return_t ret = IOConnectCallMethod(dev->fd, AGX_SELECTOR_SUBMIT_COMMAND_BUFFERS, &scalar, 1, diff --git a/src/asahi/lib/cmdbuf.xml b/src/asahi/lib/cmdbuf.xml index ab74bc79162..e69e4769223 100644 --- a/src/asahi/lib/cmdbuf.xml +++ b/src/asahi/lib/cmdbuf.xml @@ -515,18 +515,18 @@ <!--- The rest of this file is likely software defined by macOS kernel --> <enum name="IOGPU Attachment Type"> - <value name="Colour" value="0xA"/> - <value name="Depth" value="0xC"/> - <value name="Stencil" value="0xD"/> + <value name="Colour" value="0xE"/> + <value name="Depth" value="0x10"/> + <value name="Stencil" value="0x11"/> </enum> <struct name="IOGPU Header" size="192"> <field name="Unk 0" start="0:0" size="32" default="0x10000" type="hex"/> <field name="Total size" start="1:0" size="32" type="uint"/> - <field name="Unk 2" start="2:0" size="32" default="0x7" type="hex"/> - <field name="Attachment offset 1" start="8:0" size="32" type="uint"/> + <!-- 0x7 in 11.x --> + <field name="Unk 2" start="2:0" size="32" default="0x4" type="hex"/> <field name="Attachment length" start="9:0" size="32" type="uint"/> - <field name="Attachment offset 2" start="10:0" size="32" type="uint"/> + <field name="Attachment offset" start="10:0" size="32" type="uint"/> <field name="Unknown offset" start="11:0" size="32" type="uint"/> <field name="Unk 4" start="12:0" size="32" default="0x30" type="hex"/> <field name="Unk 5" start="13:0" size="32" default="0x01" type="hex"/> @@ -541,42 +541,42 @@ <field name="Unk 0" start="0:0" size="16" default="0x100" type="hex"/> <field name="Address" start="0:16" size="48" type="address"/> <field name="Type" start="2:16" size="16" type="IOGPU Attachment Type"/> - <field name="Size" start="3:16" size="32" type="uint"/> + <field name="Size" start="3:9" size="32" type="uint"/> <field name="Unk 3" start="4:16" size="4" type="hex" default="0xC"/> <!-- Percent of total attachment space used for this attachment, expressed in a decimal percentage [0, 100] <field name="Percent" start="5:16" --> <field name="Percent" start="5:16" size="16" type="uint"/> </struct> - <struct name="IOGPU Internal Pipelines" size="256"> - <field name="Clear pipeline bind" start="0:0" size="32" type="hex"/> - <field name="Clear pipeline unk" start="2:0" size="4" default="4" type="hex"/> - <field name="Clear pipeline" start="2:4" size="28" type="address" modifier="shr(4)"/> - <field name="Store pipeline bind" start="7:0" size="32" type="hex"/> - <field name="Store pipeline unk" start="8:0" size="4" default="4" type="hex"/> - <field name="Store pipeline" start="8:4" size="28" type="address" modifier="shr(4)"/> - <field name="Scissor array" start="10:0" size="64" type="address"/> + <struct name="IOGPU Internal Pipelines" size="272"> + <field name="Clear pipeline bind" start="2:0" size="32" type="hex"/> + <field name="Clear pipeline unk" start="4:0" size="4" default="4" type="hex"/> + <field name="Clear pipeline" start="4:4" size="28" type="address" modifier="shr(4)"/> + <field name="Store pipeline bind" start="10:0" size="32" type="hex"/> + <field name="Store pipeline unk" start="12:0" size="4" default="4" type="hex"/> + <field name="Store pipeline" start="12:4" size="28" type="address" modifier="shr(4)"/> + <field name="Scissor array" start="14:0" size="64" type="address"/> <!-- Points to zeroes, allocation of 0xc0000 bytes unknwon type 28000000 --> - <field name="Unknown buffer" start="12:0" size="64" type="address"/> - <field name="Depth pipeline unk" start="16:0" size="4" default="4" type="hex"/> + <field name="Unknown buffer" start="16:0" size="64" type="address"/> + <field name="Depth pipeline unk" start="20:0" size="4" default="4" type="hex"/> <!-- 0xc0150 with depth clear and z32f and s8 0x40150 with z32f and s8 0x40 with z32f 0x4000040 with z16? --> - <field name="Depth pipeline" start="16:4" size="28" type="address" modifier="shr(4)"/> - <field name="Depth unknown 1" start="22:0" size="32" type="hex"/> - <field name="Depth buffer (if clearing)" start="24:0" size="64" type="address"/> - <field name="Depth acceleration buffer (if clearing)" start="30:0" size="64" type="address"/> + <field name="Depth pipeline" start="20:4" size="28" type="address" modifier="shr(4)"/> + <field name="Depth unknown 1" start="26:0" size="32" type="hex"/> + <field name="Depth buffer (if clearing)" start="28:0" size="64" type="address"/> + <field name="Depth acceleration buffer (if clearing)" start="34:0" size="64" type="address"/> <!-- bytes unknown type 888F50 --> - <field name="Depth buffer" start="34:0" size="64" type="address"/> + <field name="Depth buffer" start="38:0" size="64" type="address"/> <!-- 16384 bytes, initialized with 0x7F bytes --> - <field name="Depth acceleration buffer" start="40:0" size="64" type="address"/> - <field name="Stencil buffer" start="44:0" size="64" type="address"/> + <field name="Depth acceleration buffer" start="44:0" size="64" type="address"/> + <field name="Stencil buffer" start="48:0" size="64" type="address"/> <!--- 16384 bytes, initialized with 0x1F bytes --> - <field name="Stencil acceleration buffer" start="50:0" size="64" type="address"/> - <field name="Stencil buffer 2" start="54:0" size="64" type="address"/> - <field name="Stencil acceleration buffer 2" start="60:0" size="64" type="address"/> + <field name="Stencil acceleration buffer" start="54:0" size="64" type="address"/> + <field name="Stencil buffer 2" start="58:0" size="64" type="address"/> + <field name="Stencil acceleration buffer 2" start="64:0" size="64" type="address"/> </struct> <struct name="IOGPU Aux Framebuffer" size="32"> @@ -588,35 +588,42 @@ <field name="Pointer" start="6:0" size="64" type="address"/> </struct> - <struct name="IOGPU Clear Z/S" size="32"> + <struct name="IOGPU Clear Z/S" size="48"> <!-- Encoded like the depth attachment --> - <field name="Depth clear value" start="2:0" size="32" type="hex"/> - <field name="Stencil clear value" start="3:0" size="8" type="uint"/> - <field name="Unk 1" start="3:8" size="8" type="hex" default="3"/> - <field name="Unk 2" start="5:8" size="8" type="hex" default="1"/> - <field name="Z16 Unorm attachment" start="7:8" size="1" type="bool"/> - </struct> - - <struct name="IOGPU Misc" size="256"> - <field name="Stencil buffer" start="0:0" size="64" type="address"/> - <field name="Stencil acceleration buffer" start="2:0" size="64" type="address"/> + <field name="Depth clear value" start="0:0" size="32" type="hex"/> + <field name="Stencil clear value" start="1:0" size="8" type="uint"/> + <field name="Unk 1" start="1:8" size="8" type="hex" default="3"/> + <field name="Unk 2" start="3:8" size="8" type="hex" default="0"/> + <field name="Z16 Unorm attachment" start="5:8" size="1" type="bool"/> + <field name="Unk 3" start="6:0" size="32" type="hex" default="0xffffffff"/> + <field name="Unk 4" start="7:0" size="32" type="hex" default="0xffffffff"/> + <field name="Unk 5" start="8:0" size="32" type="hex" default="0xffffffff"/> + </struct> + + <struct name="IOGPU Misc" size="288"> + <!-- New in 12.x --> + <field name="Depth buffer" start="0:0" size="64" type="address"/> + <field name="Depth acceleration buffer" start="2:0" size="64" type="address"/> + <field name="Stencil buffer" start="4:0" size="64" type="address"/> + <field name="Stencil acceleration buffer" start="6:0" size="64" type="address"/> <!-- maybe only set when doing a depth clear? --> - <field name="Unk 8:0" start="8:0" size="32" default="0x1" type="hex"/> - <field name="Unk 16:0" start="16:0" size="32" default="0x1c" type="hex"/> - <field name="Encoder ID" start="18:0" size="32" type="hex"/> + <field name="Unk 8:0" start="12:0" size="32" default="0x1" type="hex"/> + <field name="Unk 16:0" start="20:0" size="32" default="0x1c" type="hex"/> + <field name="Encoder ID" start="22:0" size="32" type="hex"/> <!-- top bit maybe only set with a depth clear? --> - <field name="Unk 21:0" start="21:0" size="64" default="0x1ffffffff" type="hex"/> - <field name="Unknown buffer" start="26:0" size="64" type="address"/> - <field name="Width" start="30:0" size="32" type="uint"/> - <field name="Height" start="31:0" size="32" type="uint"/> - <field name="Unk 32:0" start="32:0" size="32" default="1" type="uint"/> - <field name="Unk 33:0" start="33:0" size="32" default="8" type="uint"/> - <field name="Unk 34:0" start="34:0" size="32" default="8" type="uint"/> - <field name="Unk 49:0" start="49:0" size="32" default="8" type="uint"/> - <field name="Unk 50:0" start="50:0" size="32" default="32" type="uint"/> - <field name="Unk 51:0" start="51:0" size="32" default="32" type="uint"/> - <field name="Unk 52:0" start="52:0" size="32" default="1" type="uint"/> - <field name="Unk 56:0" start="56:0" size="32" default="1" type="uint"/> + <field name="Unk 21:0" start="25:0" size="64" default="0x1ffffffff" type="hex"/> + <field name="Unknown buffer" start="30:0" size="64" type="address"/> + <field name="Width" start="42:0" size="32" type="uint"/> + <field name="Height" start="43:0" size="32" type="uint"/> + <field name="Unk 32:0" start="44:0" size="32" default="1" type="uint"/> + <field name="Unk 33:0" start="45:0" size="32" default="8" type="uint"/> + <field name="Unk 34:0" start="46:0" size="32" default="8" type="uint"/> + <field name="Unk 49:0" start="61:0" size="32" default="8" type="uint"/> + <field name="Unk 50:0" start="62:0" size="32" default="32" type="uint"/> + <field name="Unk 51:0" start="63:0" size="32" default="32" type="uint"/> + <field name="Unk 52:0" start="64:0" size="32" default="1" type="uint"/> + <field name="Unk 56:0" start="68:0" size="32" default="0" type="uint"/> + <field name="Unk 70:0" start="70:0" size="32" default="1" type="uint"/> </struct> </agxml> diff --git a/src/asahi/lib/decode.c b/src/asahi/lib/decode.c index 562bfc6b634..e0c21d79aaf 100644 --- a/src/asahi/lib/decode.c +++ b/src/asahi/lib/decode.c @@ -441,14 +441,18 @@ agxdecode_cmdstream(unsigned cmdbuf_handle, unsigned map_handle, bool verbose) /* Print the IOGPU stuff */ agx_unpack(agxdecode_dump_stream, cmdbuf->ptr.cpu, IOGPU_HEADER, cmd); DUMP_UNPACKED(IOGPU_HEADER, cmd, "IOGPU Header\n"); - assert(cmd.attachment_offset_1 == cmd.attachment_offset_2); - DUMP_CL(IOGPU_INTERNAL_PIPELINES, ((uint32_t *) cmdbuf->ptr.cpu) + 156, "Internal pipelines"); - DUMP_CL(IOGPU_AUX_FRAMEBUFFER, ((uint32_t *) cmdbuf->ptr.cpu) + 220, "Aux Framebuffer"); - DUMP_CL(IOGPU_CLEAR_Z_S, ((uint32_t *) cmdbuf->ptr.cpu) + 276, "Clear Z/S"); - DUMP_CL(IOGPU_MISC, ((uint32_t *) cmdbuf->ptr.cpu) + 344, "Misc"); + DUMP_CL(IOGPU_INTERNAL_PIPELINES, ((uint32_t *) cmdbuf->ptr.cpu) + 160, "Internal pipelines"); + DUMP_CL(IOGPU_AUX_FRAMEBUFFER, ((uint32_t *) cmdbuf->ptr.cpu) + 228, "Aux Framebuffer"); + DUMP_CL(IOGPU_CLEAR_Z_S, ((uint32_t *) cmdbuf->ptr.cpu) + 292, "Clear Z/S"); - uint32_t *attachments = (uint32_t *) ((uint8_t *) cmdbuf->ptr.cpu + cmd.attachment_offset_1); + /* Guard against changes */ + uint32_t zeroes[356 - 344] = { 0 }; + assert(memcmp(((uint32_t *) cmdbuf->ptr.cpu) + 344, zeroes, 4 * (356 - 344)) == 0); + + DUMP_CL(IOGPU_MISC, ((uint32_t *) cmdbuf->ptr.cpu) + 356, "Misc"); + + uint32_t *attachments = (uint32_t *) ((uint8_t *) cmdbuf->ptr.cpu + cmd.attachment_offset); unsigned attachment_count = attachments[3]; for (unsigned i = 0; i < attachment_count; ++i) { uint32_t *ptr = attachments + 4 + (i * AGX_IOGPU_ATTACHMENT_LENGTH / 4); diff --git a/src/asahi/lib/io.h b/src/asahi/lib/io.h index 40b9f2ddb7b..a1f442eaf48 100644 --- a/src/asahi/lib/io.h +++ b/src/asahi/lib/io.h @@ -47,7 +47,7 @@ enum agx_selector { AGX_SELECTOR_FREE_NOTIFICATION_QUEUE = 0x12, AGX_SELECTOR_SUBMIT_COMMAND_BUFFERS = 0x1E, AGX_SELECTOR_GET_VERSION = 0x23, - AGX_NUM_SELECTORS = 0x30 + AGX_NUM_SELECTORS = 0x32 }; static const char *selector_table[AGX_NUM_SELECTORS] = { @@ -98,7 +98,9 @@ static const char *selector_table[AGX_NUM_SELECTORS] = { "unk2C", "unk2D", "unk2E", - "unk2F" + "unk2F", + "unk30", + "unk31" }; static inline const char * @@ -134,6 +136,7 @@ struct agx_submit_cmdbuf_req { uint32_t unk1; uint32_t cmdbuf; uint32_t mappings; + uint64_t unk1B; // 0, new in 12.x void *user_0; void *user_1; uint32_t unk2; @@ -188,10 +191,11 @@ struct agx_command_queue { struct agx_map_header { uint64_t cmdbuf_id; // GUID uint32_t unk2; // 01 00 00 00 - uint32_t unk3; // 28 05 00 80 + uint32_t unk3; // 28 05 00 80, 12.x: 30 01 00 80 uint64_t encoder_id; // GUID uint32_t unk6; // 00 00 00 00 uint32_t cmdbuf_size; + uint32_t padding[2]; uint32_t nr_handles; uint32_t nr_entries; } __attribute__((packed)); diff --git a/src/gallium/drivers/asahi/magic.c b/src/gallium/drivers/asahi/magic.c index 1961a71e124..6a3a6f85a23 100644 --- a/src/gallium/drivers/asahi/magic.c +++ b/src/gallium/drivers/asahi/magic.c @@ -160,22 +160,24 @@ demo_cmdbuf(uint64_t *buf, size_t size, bool clear_pipeline_textures) { uint32_t *map = (uint32_t *) buf; - memset(map, 0, 474 * 4); + memset(map, 0, 518 * 4); map[54] = 0x6b0003; map[55] = 0x3a0012; map[56] = 1; - map[106] = 1; - map[108] = 0x1c; - map[112] = 0xffffffff; - map[113] = 0xffffffff; - map[114] = 0xffffffff; + /* Unknown address at word 110 */ + + map[112] = 1; + map[114] = 0x1c; + map[118] = 0xffffffff; + map[119] = 0xffffffff; + map[120] = 0xffffffff; uint64_t unk_buffer = demo_zero(pool, 0x1000); uint64_t unk_buffer_2 = demo_zero(pool, 0x8000); - agx_pack(map + 156, IOGPU_INTERNAL_PIPELINES, cfg) { + agx_pack(map + 160, IOGPU_INTERNAL_PIPELINES, cfg) { cfg.clear_pipeline_bind = 0xffff8002 | (clear_pipeline_textures ? 0x210 : 0); cfg.clear_pipeline = pipeline_clear; cfg.store_pipeline_bind = 0x12; @@ -184,37 +186,33 @@ demo_cmdbuf(uint64_t *buf, size_t size, cfg.unknown_buffer = unk_buffer; } - agx_pack(map + 220, IOGPU_AUX_FRAMEBUFFER, cfg) { + agx_pack(map + 228, IOGPU_AUX_FRAMEBUFFER, cfg) { cfg.width = framebuffer->width; cfg.height = framebuffer->height; cfg.z16_unorm_attachment = false; cfg.pointer = unk_buffer_2; } - agx_pack(map + 276, IOGPU_CLEAR_Z_S, cfg) { + agx_pack(map + 292, IOGPU_CLEAR_Z_S, cfg) { cfg.depth_clear_value = fui(1.0); // 32-bit float cfg.stencil_clear_value = 0; cfg.z16_unorm_attachment = false; } - map[284] = 0xffffffff; - map[285] = 0xffffffff; - map[286] = 0xffffffff; - - map[298] = 0xffff8212; - map[300] = pipeline_null | 0x4; - map[305] = 0x12; - map[306] = pipeline_store | 0x4; + map[312] = 0xffff8212; + map[314] = pipeline_null | 0x4; + map[320] = 0x12; + map[322] = pipeline_store | 0x4; - agx_pack(map + 344, IOGPU_MISC, cfg) { + agx_pack(map + 356, IOGPU_MISC, cfg) { cfg.encoder_id = encoder_id; cfg.unknown_buffer = demo_unk6(pool); cfg.width = framebuffer->width; cfg.height = framebuffer->height; } - unsigned offset_unk = (458 * 4); - unsigned offset_attachments = (470 * 4); + unsigned offset_unk = (484 * 4); + unsigned offset_attachments = (496 * 4); unsigned nr_attachments = asahi_pack_iogpu_attachments(map + (offset_attachments / 4) + 4, @@ -226,8 +224,7 @@ demo_cmdbuf(uint64_t *buf, size_t size, agx_pack(map, IOGPU_HEADER, cfg) { cfg.total_size = total_size; - cfg.attachment_offset_1 = offset_attachments; - cfg.attachment_offset_2 = offset_attachments; + cfg.attachment_offset = offset_attachments; cfg.attachment_length = nr_attachments * AGX_IOGPU_ATTACHMENT_LENGTH; cfg.unknown_offset = offset_unk; cfg.encoder = encoder_ptr;
