Module: Mesa Branch: main Commit: bb16154d948ad3d1933fc3d26e9c681d3dab1c3e URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=bb16154d948ad3d1933fc3d26e9c681d3dab1c3e
Author: Pierre-Eric Pelloux-Prayer <[email protected]> Date: Tue Mar 29 14:14:34 2022 +0200 radeonsi: add helpers to deal with spm counters Based on radv_perfcounter.c Reviewed-by: Marek Olšák <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15646> --- src/gallium/drivers/radeonsi/si_perfcounter.c | 45 +++++++++++++++++++++++++++ src/gallium/drivers/radeonsi/si_pipe.h | 3 ++ 2 files changed, 48 insertions(+) diff --git a/src/gallium/drivers/radeonsi/si_perfcounter.c b/src/gallium/drivers/radeonsi/si_perfcounter.c index d6f46abcd75..0fb56718935 100644 --- a/src/gallium/drivers/radeonsi/si_perfcounter.c +++ b/src/gallium/drivers/radeonsi/si_perfcounter.c @@ -163,6 +163,51 @@ static void si_pc_emit_stop(struct si_context *sctx, struct si_resource *buffer, radeon_end(); } +void si_pc_emit_spm_start(struct radeon_cmdbuf *cs) +{ + radeon_begin(cs); + + /* Start SPM counters. */ + radeon_set_uconfig_reg(R_036020_CP_PERFMON_CNTL, + S_036020_PERFMON_STATE(V_036020_CP_PERFMON_STATE_DISABLE_AND_RESET) | + S_036020_SPM_PERFMON_STATE(V_036020_STRM_PERFMON_STATE_START_COUNTING)); + /* Start windowed performance counters. */ + radeon_emit(PKT3(PKT3_EVENT_WRITE, 0, 0)); + radeon_emit(EVENT_TYPE(V_028A90_PERFCOUNTER_START) | EVENT_INDEX(0)); + radeon_set_sh_reg(R_00B82C_COMPUTE_PERFCOUNT_ENABLE, S_00B82C_PERFCOUNT_ENABLE(1)); + + radeon_end(); +} + +void si_pc_emit_spm_stop(struct radeon_cmdbuf *cs, bool never_stop_sq_perf_counters) +{ + radeon_begin(cs); + + /* Stop windowed performance counters. */ + radeon_emit(PKT3(PKT3_EVENT_WRITE, 0, 0)); + radeon_emit(EVENT_TYPE(V_028A90_PERFCOUNTER_STOP) | EVENT_INDEX(0)); + radeon_set_sh_reg(R_00B82C_COMPUTE_PERFCOUNT_ENABLE, S_00B82C_PERFCOUNT_ENABLE(0)); + + /* Stop SPM counters. */ + radeon_set_uconfig_reg(R_036020_CP_PERFMON_CNTL, + S_036020_PERFMON_STATE(V_036020_CP_PERFMON_STATE_DISABLE_AND_RESET) | + S_036020_SPM_PERFMON_STATE(never_stop_sq_perf_counters ? + V_036020_STRM_PERFMON_STATE_START_COUNTING : + V_036020_STRM_PERFMON_STATE_STOP_COUNTING)); + + radeon_end(); +} + +void si_pc_emit_spm_reset(struct radeon_cmdbuf *cs) +{ + radeon_begin(cs); + radeon_set_uconfig_reg(R_036020_CP_PERFMON_CNTL, + S_036020_PERFMON_STATE(V_036020_CP_PERFMON_STATE_DISABLE_AND_RESET) | + S_036020_SPM_PERFMON_STATE(V_036020_STRM_PERFMON_STATE_DISABLE_AND_RESET)); + radeon_end(); +} + + static void si_pc_emit_read(struct si_context *sctx, struct ac_pc_block *block, unsigned count, uint64_t va) { diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h index 45390f57854..82075cf9e4d 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.h +++ b/src/gallium/drivers/radeonsi/si_pipe.h @@ -1509,6 +1509,9 @@ void si_init_perfcounters(struct si_screen *screen); void si_destroy_perfcounters(struct si_screen *screen); void si_inhibit_clockgating(struct si_context *sctx, struct radeon_cmdbuf *cs, bool inhibit); void si_pc_emit_shaders(struct radeon_cmdbuf *cs, unsigned shaders); +void si_pc_emit_spm_start(struct radeon_cmdbuf *cs); +void si_pc_emit_spm_stop(struct radeon_cmdbuf *cs, bool never_stop_sq_perf_counters); +void si_pc_emit_spm_reset(struct radeon_cmdbuf *cs); /* si_query.c */ void si_init_screen_query_functions(struct si_screen *sscreen);
