Module: Mesa Branch: main Commit: 68c05c660b24427ecdcd9584f547986ba380d59b URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=68c05c660b24427ecdcd9584f547986ba380d59b
Author: Alyssa Rosenzweig <[email protected]> Date: Mon Apr 25 10:24:24 2022 -0400 panvk: Respect line width Fixes: dEQP-VK.pipeline.input_assembly.primitive_topology.index_type_uint16.line_list Signed-off-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16140> --- src/panfrost/vulkan/panvk_vX_pipeline.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/panfrost/vulkan/panvk_vX_pipeline.c b/src/panfrost/vulkan/panvk_vX_pipeline.c index 2af769ae28f..84860706b2a 100644 --- a/src/panfrost/vulkan/panvk_vX_pipeline.c +++ b/src/panfrost/vulkan/panvk_vX_pipeline.c @@ -739,6 +739,7 @@ panvk_pipeline_builder_parse_rast(struct panvk_pipeline_builder *builder, pipeline->rast.front_ccw = builder->create_info.gfx->pRasterizationState->frontFace == VK_FRONT_FACE_COUNTER_CLOCKWISE; pipeline->rast.cull_front_face = builder->create_info.gfx->pRasterizationState->cullMode & VK_CULL_MODE_FRONT_BIT; pipeline->rast.cull_back_face = builder->create_info.gfx->pRasterizationState->cullMode & VK_CULL_MODE_BACK_BIT; + pipeline->rast.line_width = builder->create_info.gfx->pRasterizationState->lineWidth; } static bool
