Module: Mesa Branch: staging/22.0 Commit: 363882d51bc877fb59b51ec9017d350c107732fa URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=363882d51bc877fb59b51ec9017d350c107732fa
Author: Samuel Pitoiset <[email protected]> Date: Fri Apr 22 15:15:33 2022 +0200 aco: fix load_barycentric_at_{sample,offset} on GFX6-7 The computation was wrong. Fixes dEQP-GLES31.functional.shaders.multisample_interpolation.interpolate_at_offset.* with Zink on GFX6 (Pitcairn). Cc: mesa-stable Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Rhys Perry <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16099> (cherry picked from commit 6873da0e42182520a38a6f88abb3717eea12d774) --- .pick_status.json | 2 +- src/amd/compiler/aco_instruction_selection.cpp | 9 +++++---- 2 files changed, 6 insertions(+), 5 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 3781cf0c5e0..193d0097df6 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -588,7 +588,7 @@ "description": "aco: fix load_barycentric_at_{sample,offset} on GFX6-7", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "because_sha": null }, { diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp index 2d24932208c..939f4edb0dd 100644 --- a/src/amd/compiler/aco_instruction_selection.cpp +++ b/src/amd/compiler/aco_instruction_selection.cpp @@ -7940,11 +7940,12 @@ emit_interp_center(isel_context* ctx, Temp dst, Temp bary, Temp pos1, Temp pos2) Temp tl_1 = bld.ds(aco_opcode::ds_swizzle_b32, bld.def(v1), p1, (1 << 15) | dpp_ctrl0); ddx_1 = bld.ds(aco_opcode::ds_swizzle_b32, bld.def(v1), p1, (1 << 15) | dpp_ctrl1); ddx_1 = bld.vop2(aco_opcode::v_sub_f32, bld.def(v1), ddx_1, tl_1); - ddx_2 = bld.ds(aco_opcode::ds_swizzle_b32, bld.def(v1), p1, (1 << 15) | dpp_ctrl2); - ddx_2 = bld.vop2(aco_opcode::v_sub_f32, bld.def(v1), ddx_2, tl_1); + ddy_1 = bld.ds(aco_opcode::ds_swizzle_b32, bld.def(v1), p1, (1 << 15) | dpp_ctrl2); + ddy_1 = bld.vop2(aco_opcode::v_sub_f32, bld.def(v1), ddy_1, tl_1); + Temp tl_2 = bld.ds(aco_opcode::ds_swizzle_b32, bld.def(v1), p2, (1 << 15) | dpp_ctrl0); - ddy_1 = bld.ds(aco_opcode::ds_swizzle_b32, bld.def(v1), p2, (1 << 15) | dpp_ctrl1); - ddy_1 = bld.vop2(aco_opcode::v_sub_f32, bld.def(v1), ddy_1, tl_2); + ddx_2 = bld.ds(aco_opcode::ds_swizzle_b32, bld.def(v1), p2, (1 << 15) | dpp_ctrl1); + ddx_2 = bld.vop2(aco_opcode::v_sub_f32, bld.def(v1), ddx_2, tl_2); ddy_2 = bld.ds(aco_opcode::ds_swizzle_b32, bld.def(v1), p2, (1 << 15) | dpp_ctrl2); ddy_2 = bld.vop2(aco_opcode::v_sub_f32, bld.def(v1), ddy_2, tl_2); }
