Module: Mesa Branch: main Commit: d5debf0d8afab24e3034288d5a03caacf7b5cdd2 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d5debf0d8afab24e3034288d5a03caacf7b5cdd2
Author: Danylo Piliaiev <[email protected]> Date: Thu Apr 14 17:15:49 2022 +0300 freedreno/a6xx: Add UNK fields to CP_REG_TEST and CP_COND_REG_EXEC Their meaning is unknown, however they DO change the behavior. Signed-off-by: Danylo Piliaiev <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15974> --- src/freedreno/registers/adreno/adreno_pm4.xml | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/src/freedreno/registers/adreno/adreno_pm4.xml b/src/freedreno/registers/adreno/adreno_pm4.xml index 7b898709ab9..0b3bf0f1686 100644 --- a/src/freedreno/registers/adreno/adreno_pm4.xml +++ b/src/freedreno/registers/adreno/adreno_pm4.xml @@ -1604,6 +1604,13 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords) <bitfield name="BIT" low="20" high="24" type="uint"/> <!-- execute CP_WAIT_FOR_ME beforehand --> <bitfield name="WAIT_FOR_ME" pos="25" type="boolean"/> + <!-- + Appears only in: + opcode: CP_REG_TEST (39) (4 dwords) + { REG = 0 | BIT = 0 | WAIT_FOR_ME | UNK31 } + Seem to force CP_REG_TEST to write false + --> + <bitfield name="UNK31" pos="31" type="boolean"/> </reg32> </domain> @@ -1620,6 +1627,16 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords) <reg32 offset="0" name="0"> <bitfield name="REG0" low="0" high="17" type="hex"/> + <!-- + Blob uses them for vkCmdClearAttachments in gmem mode. Examples: + opcode: CP_COND_REG_EXEC (47) (3 dwords) + { REG0 = 0 | MODE = PRED_TEST | 0x140000 } + opcode: CP_COND_REG_EXEC (47) (3 dwords) + { REG0 = 0 | MODE = PRED_TEST | 0x100000 } + --> + <bitfield name="UNK18" pos="18" varset="chip" variants="A6XX-" type="boolean"/> + <bitfield name="UNK20" pos="20" varset="chip" variants="A6XX-" type="boolean"/> + <!-- Note: these bits have the same meaning, and use the same internal mechanism as the bits in CP_SET_DRAW_STATE.
