Module: Mesa Branch: main Commit: 52952f51cd53029087f3d82fdd2f25e15bacb013 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=52952f51cd53029087f3d82fdd2f25e15bacb013
Author: Samuel Pitoiset <[email protected]> Date: Fri May 6 11:16:31 2022 +0200 aco: do not align VGPRS to 8 or 16 on GFX11 Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Rhys Perry <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16369> --- src/amd/compiler/aco_ir.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/amd/compiler/aco_ir.cpp b/src/amd/compiler/aco_ir.cpp index be31b95e3a2..2510495e126 100644 --- a/src/amd/compiler/aco_ir.cpp +++ b/src/amd/compiler/aco_ir.cpp @@ -105,7 +105,7 @@ init_program(Program* program, Stage stage, const struct aco_shader_info* info, program->dev.sgpr_alloc_granule = 128; program->dev.sgpr_limit = 108; /* includes VCC, which can be treated as s[106-107] on GFX10+ */ - if (chip_class >= GFX10_3) + if (chip_class == GFX10_3) program->dev.vgpr_alloc_granule = program->wave_size == 32 ? 16 : 8; else program->dev.vgpr_alloc_granule = program->wave_size == 32 ? 8 : 4;
