Module: Mesa Branch: main Commit: f242c9af763ab7dc3d618a80c962d6bfdf73f3a5 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f242c9af763ab7dc3d618a80c962d6bfdf73f3a5
Author: Lionel Landwerlin <[email protected]> Date: Mon Aug 1 18:12:45 2022 +0300 intel/fs: bump max SIMD size for A64 atomics with LSC Signed-off-by: Lionel Landwerlin <[email protected]> Tested-by: Rohan Garg <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>. Reviewed-by: Rohan Garg <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17555> --- src/intel/compiler/brw_fs.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp index c2374591908..04ce20abb17 100644 --- a/src/intel/compiler/brw_fs.cpp +++ b/src/intel/compiler/brw_fs.cpp @@ -5047,7 +5047,7 @@ get_lowered_simd_width(const struct brw_compiler *compiler, case SHADER_OPCODE_A64_UNTYPED_ATOMIC_FLOAT16_LOGICAL: case SHADER_OPCODE_A64_UNTYPED_ATOMIC_FLOAT32_LOGICAL: case SHADER_OPCODE_A64_UNTYPED_ATOMIC_FLOAT64_LOGICAL: - return 8; + return devinfo->has_lsc ? MIN2(16, inst->exec_size) : 8; case SHADER_OPCODE_URB_READ_LOGICAL: case SHADER_OPCODE_URB_WRITE_LOGICAL:
