Module: Mesa Branch: main Commit: 556b29797724bdf92bfb920fc30c2ccc9dd8efd1 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=556b29797724bdf92bfb920fc30c2ccc9dd8efd1
Author: Samuel Pitoiset <[email protected]> Date: Mon Aug 29 18:12:23 2022 +0200 radv: pass the number of patch control points to si_get_ia_multi_vgt_param() To prepare for dynamic patch control points. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timur Kristóf <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18344> --- src/amd/vulkan/radv_cmd_buffer.c | 4 +++- src/amd/vulkan/radv_private.h | 2 +- src/amd/vulkan/si_cmd_buffer.c | 5 +++-- 3 files changed, 7 insertions(+), 4 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 0bce238ba02..86c82ffa007 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -3982,12 +3982,14 @@ si_emit_ia_multi_vgt_param(struct radv_cmd_buffer *cmd_buffer, bool instanced_dr struct radv_cmd_state *state = &cmd_buffer->state; unsigned topology = state->dynamic.primitive_topology; bool prim_restart_enable = state->dynamic.primitive_restart_enable; + unsigned patch_control_points = state->graphics_pipeline->tess_patch_control_points; struct radeon_cmdbuf *cs = cmd_buffer->cs; unsigned ia_multi_vgt_param; ia_multi_vgt_param = si_get_ia_multi_vgt_param(cmd_buffer, instanced_draw, indirect_draw, count_from_stream_output, - draw_vertex_count, topology, prim_restart_enable); + draw_vertex_count, topology, prim_restart_enable, + patch_control_points); if (state->last_ia_multi_vgt_param != ia_multi_vgt_param) { if (info->gfx_level == GFX9) { diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h index adc00554685..d93c17d7c90 100644 --- a/src/amd/vulkan/radv_private.h +++ b/src/amd/vulkan/radv_private.h @@ -1673,7 +1673,7 @@ void si_write_guardband(struct radeon_cmdbuf *cs, int count, const VkViewport *v uint32_t si_get_ia_multi_vgt_param(struct radv_cmd_buffer *cmd_buffer, bool instanced_draw, bool indirect_draw, bool count_from_stream_output, uint32_t draw_vertex_count, unsigned topology, - bool prim_restart_enable); + bool prim_restart_enable, unsigned patch_control_points); void si_cs_emit_write_event_eop(struct radeon_cmdbuf *cs, enum amd_gfx_level gfx_level, bool is_mec, unsigned event, unsigned event_flags, unsigned dst_sel, unsigned data_sel, uint64_t va, uint32_t new_fence, diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c index fc2140737f0..795a161096a 100644 --- a/src/amd/vulkan/si_cmd_buffer.c +++ b/src/amd/vulkan/si_cmd_buffer.c @@ -815,7 +815,8 @@ static const struct radv_prim_vertex_count prim_size_table[] = { uint32_t si_get_ia_multi_vgt_param(struct radv_cmd_buffer *cmd_buffer, bool instanced_draw, bool indirect_draw, bool count_from_stream_output, - uint32_t draw_vertex_count, unsigned topology, bool prim_restart_enable) + uint32_t draw_vertex_count, unsigned topology, bool prim_restart_enable, + unsigned patch_control_points) { enum amd_gfx_level gfx_level = cmd_buffer->device->physical_device->rad_info.gfx_level; enum radeon_family family = cmd_buffer->device->physical_device->rad_info.family; @@ -832,7 +833,7 @@ si_get_ia_multi_vgt_param(struct radv_cmd_buffer *cmd_buffer, bool instanced_dra if (radv_pipeline_has_stage(cmd_buffer->state.graphics_pipeline, MESA_SHADER_TESS_CTRL)) { if (topology == V_008958_DI_PT_PATCH) { - prim_vertex_count.min = cmd_buffer->state.graphics_pipeline->tess_patch_control_points; + prim_vertex_count.min = patch_control_points; prim_vertex_count.incr = 1; } }
