Module: Mesa Branch: main Commit: daf0b67bc23c419513fbb9de629eaa9b74acc9e9 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=daf0b67bc23c419513fbb9de629eaa9b74acc9e9
Author: José Roberto de Souza <[email protected]> Date: Thu Sep 8 08:49:05 2022 -0700 intel/compiler/fs: Fix compilation of shaders with SHADER_OPCODE_SHUFFLE of float64 type During the lower_regioning() optimization, required_exec_type() is returning BRW_REGISTER_TYPE_UQ type when processing SHADER_OPCODE_SHUFFLE instructions of type BRW_REGISTER_TYPE_DF but MTL has float64 support but lacks int64 support causing shader compilation to fail. To fix that we could make required_exec_type() return BRW_REGISTER_TYPE_DF in such case but SHADER_OPCODE_SHUFFLE virtual instruction runs in the integer pipeline(inferred_exec_pipe()). So here replacing the has_64bit check by has_64bit_int, this will properly handle older and newer cases making this function return BRW_REGISTER_TYPE_UD. Then lower_exec_type() will take care to generate 2 32bits operations to accomplish the same. While at it also dropping the 'devinfo->verx10 == 70' check as GFX7_FEATURES fall into the same category as MTL, has float64 but no int64 support. Fixes at least this crucible tests: func.uniform-subgroup.exclusive.fadd64.q0 func.uniform-subgroup.exclusive.fmin64.q0 func.uniform-subgroup.exclusive.fmax64.q0 Reviewed-by: Francisco Jerez <[email protected]> Reviewed-by: Matt Turner <[email protected]> Signed-off-by: José Roberto de Souza <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18577> --- src/intel/compiler/brw_fs_lower_regioning.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/compiler/brw_fs_lower_regioning.cpp b/src/intel/compiler/brw_fs_lower_regioning.cpp index e1fe9eaff7b..638a5c0e4ea 100644 --- a/src/intel/compiler/brw_fs_lower_regioning.cpp +++ b/src/intel/compiler/brw_fs_lower_regioning.cpp @@ -145,7 +145,7 @@ namespace { * Work around both of the above and handle platforms that * don't support 64-bit types at all. */ - if ((!has_64bit || devinfo->verx10 == 70 || + if ((!devinfo->has_64bit_int || devinfo->platform == INTEL_PLATFORM_CHV || intel_device_info_is_9lp(devinfo)) && type_sz(t) > 4) return BRW_REGISTER_TYPE_UD;
