Module: Mesa Branch: main Commit: f6d15818ca2cd0ee2c07587abe1885f16f162c3f URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f6d15818ca2cd0ee2c07587abe1885f16f162c3f
Author: Emma Anholt <[email protected]> Date: Tue Sep 13 15:57:30 2022 -0700 turnip: Add some missing LRZ disable debug. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18606> --- src/freedreno/vulkan/tu_lrz.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/src/freedreno/vulkan/tu_lrz.c b/src/freedreno/vulkan/tu_lrz.c index 31b659856b1..82098a98876 100644 --- a/src/freedreno/vulkan/tu_lrz.c +++ b/src/freedreno/vulkan/tu_lrz.c @@ -676,12 +676,23 @@ tu6_calculate_lrz_state(struct tu_cmd_buffer *cmd, /* See comment in tu_pipeline about disabling LRZ write for blending. */ if ((cmd->state.pipeline->dynamic_state_mask & BIT(TU_DYNAMIC_STATE_LOGIC_OP)) && - cmd->state.logic_op_enabled && cmd->state.rop_reads_dst) + cmd->state.logic_op_enabled && cmd->state.rop_reads_dst) { + if (gras_lrz_cntl.lrz_write) + perf_debug(cmd->device, "disabling lrz write due to dynamic logic op"); gras_lrz_cntl.lrz_write = false; + } if ((cmd->state.pipeline->dynamic_state_mask & BIT(TU_DYNAMIC_STATE_COLOR_WRITE_ENABLE)) && - cmd->state.color_write_enable != MASK(cmd->state.pipeline->num_rts)) + cmd->state.color_write_enable != MASK(cmd->state.pipeline->num_rts)) { + if (gras_lrz_cntl.lrz_write) { + perf_debug( + cmd->device, + "disabling lrz write due to dynamic color write enables (%x/%x)", + cmd->state.color_write_enable, + MASK(cmd->state.pipeline->num_rts)); + } gras_lrz_cntl.lrz_write = false; + } /* LRZ is disabled until it is cleared, which means that one "wrong" * depth test or shader could disable LRZ until depth buffer is cleared.
