Module: Mesa Branch: main Commit: 9f7535564345396de07ce59dcced593e885e15ec URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9f7535564345396de07ce59dcced593e885e15ec
Author: Tapani Pälli <[email protected]> Date: Mon Oct 17 10:47:43 2022 +0300 anv: move emit_shading_rate to gfx8_cmd_buffer Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19105> --- src/intel/vulkan/anv_genX.h | 4 -- src/intel/vulkan/genX_state.c | 81 -------------------------------------- src/intel/vulkan/gfx8_cmd_buffer.c | 81 ++++++++++++++++++++++++++++++++++++++ 3 files changed, 81 insertions(+), 85 deletions(-) diff --git a/src/intel/vulkan/anv_genX.h b/src/intel/vulkan/anv_genX.h index caddad7b7a8..b556813897c 100644 --- a/src/intel/vulkan/anv_genX.h +++ b/src/intel/vulkan/anv_genX.h @@ -134,10 +134,6 @@ void genX(emit_multisample)(struct anv_batch *batch, uint32_t samples); void genX(emit_sample_pattern)(struct anv_batch *batch, const struct vk_sample_locations_state *sl); -void genX(emit_shading_rate)(struct anv_batch *batch, - const struct anv_graphics_pipeline *pipeline, - const struct vk_fragment_shading_rate_state *fsr); - void genX(cmd_buffer_so_memcpy)(struct anv_cmd_buffer *cmd_buffer, struct anv_address dst, struct anv_address src, uint32_t size); diff --git a/src/intel/vulkan/genX_state.c b/src/intel/vulkan/genX_state.c index 7980544198a..4ea3280a808 100644 --- a/src/intel/vulkan/genX_state.c +++ b/src/intel/vulkan/genX_state.c @@ -559,41 +559,6 @@ genX(init_cps_device_state)(struct anv_device *device) #endif /* GFX_VER >= 12 */ } -#if GFX_VER >= 12 -static uint32_t -get_cps_state_offset(struct anv_device *device, bool cps_enabled, - const struct vk_fragment_shading_rate_state *fsr) -{ - if (!cps_enabled) - return device->cps_states.offset; - - uint32_t offset; - static const uint32_t size_index[] = { - [1] = 0, - [2] = 1, - [4] = 2, - }; - -#if GFX_VERx10 >= 125 - offset = - 1 + /* skip disabled */ - fsr->combiner_ops[0] * 5 * 3 * 3 + - fsr->combiner_ops[1] * 3 * 3 + - size_index[fsr->fragment_size.width] * 3 + - size_index[fsr->fragment_size.height]; -#else - offset = - 1 + /* skip disabled */ - size_index[fsr->fragment_size.width] * 3 + - size_index[fsr->fragment_size.height]; -#endif - - offset *= MAX_VIEWPORTS * GENX(CPS_STATE_length) * 4; - - return device->cps_states.offset + offset; -} -#endif /* GFX_VER >= 12 */ - void genX(emit_l3_config)(struct anv_batch *batch, const struct anv_device *device, @@ -728,52 +693,6 @@ genX(emit_sample_pattern)(struct anv_batch *batch, } } -#if GFX_VER >= 11 -void -genX(emit_shading_rate)(struct anv_batch *batch, - const struct anv_graphics_pipeline *pipeline, - const struct vk_fragment_shading_rate_state *fsr) -{ - const struct brw_wm_prog_data *wm_prog_data = get_wm_prog_data(pipeline); - const bool cps_enable = wm_prog_data && wm_prog_data->per_coarse_pixel_dispatch; - -#if GFX_VER == 11 - anv_batch_emit(batch, GENX(3DSTATE_CPS), cps) { - cps.CoarsePixelShadingMode = cps_enable ? CPS_MODE_CONSTANT : CPS_MODE_NONE; - if (cps_enable) { - cps.MinCPSizeX = fsr->fragment_size.width; - cps.MinCPSizeY = fsr->fragment_size.height; - } - } -#elif GFX_VER >= 12 - /* TODO: we can optimize this flush in the following cases: - * - * In the case where the last geometry shader emits a value that is not - * constant, we can avoid this stall because we can synchronize the - * pixel shader internally with - * 3DSTATE_PS::EnablePSDependencyOnCPsizeChange. - * - * If we know that the previous pipeline and the current one are using - * the same fragment shading rate. - */ - anv_batch_emit(batch, GENX(PIPE_CONTROL), pc) { -#if GFX_VERx10 >= 125 - pc.PSSStallSyncEnable = true; -#else - pc.PSDSyncEnable = true; -#endif - } - - anv_batch_emit(batch, GENX(3DSTATE_CPS_POINTERS), cps) { - struct anv_device *device = pipeline->base.device; - - cps.CoarsePixelShadingStateArrayPointer = - get_cps_state_offset(device, cps_enable, fsr); - } -#endif -} -#endif /* GFX_VER >= 11 */ - static uint32_t vk_to_intel_tex_filter(VkFilter filter, bool anisotropyEnable) { diff --git a/src/intel/vulkan/gfx8_cmd_buffer.c b/src/intel/vulkan/gfx8_cmd_buffer.c index aeef7c4c9f3..f4a7f926015 100644 --- a/src/intel/vulkan/gfx8_cmd_buffer.c +++ b/src/intel/vulkan/gfx8_cmd_buffer.c @@ -277,6 +277,87 @@ genX(cmd_emit_sample_mask)(struct anv_cmd_buffer *cmd_buffer) } } +#if GFX_VER >= 12 +static uint32_t +get_cps_state_offset(struct anv_device *device, bool cps_enabled, + const struct vk_fragment_shading_rate_state *fsr) +{ + if (!cps_enabled) + return device->cps_states.offset; + + uint32_t offset; + static const uint32_t size_index[] = { + [1] = 0, + [2] = 1, + [4] = 2, + }; + +#if GFX_VERx10 >= 125 + offset = + 1 + /* skip disabled */ + fsr->combiner_ops[0] * 5 * 3 * 3 + + fsr->combiner_ops[1] * 3 * 3 + + size_index[fsr->fragment_size.width] * 3 + + size_index[fsr->fragment_size.height]; +#else + offset = + 1 + /* skip disabled */ + size_index[fsr->fragment_size.width] * 3 + + size_index[fsr->fragment_size.height]; +#endif + + offset *= MAX_VIEWPORTS * GENX(CPS_STATE_length) * 4; + + return device->cps_states.offset + offset; +} +#endif /* GFX_VER >= 12 */ + +#if GFX_VER >= 11 +static void +genX(emit_shading_rate)(struct anv_batch *batch, + const struct anv_graphics_pipeline *pipeline, + const struct vk_fragment_shading_rate_state *fsr) +{ + const struct brw_wm_prog_data *wm_prog_data = get_wm_prog_data(pipeline); + const bool cps_enable = wm_prog_data && wm_prog_data->per_coarse_pixel_dispatch; + +#if GFX_VER == 11 + anv_batch_emit(batch, GENX(3DSTATE_CPS), cps) { + cps.CoarsePixelShadingMode = cps_enable ? CPS_MODE_CONSTANT : CPS_MODE_NONE; + if (cps_enable) { + cps.MinCPSizeX = fsr->fragment_size.width; + cps.MinCPSizeY = fsr->fragment_size.height; + } + } +#elif GFX_VER >= 12 + /* TODO: we can optimize this flush in the following cases: + * + * In the case where the last geometry shader emits a value that is not + * constant, we can avoid this stall because we can synchronize the + * pixel shader internally with + * 3DSTATE_PS::EnablePSDependencyOnCPsizeChange. + * + * If we know that the previous pipeline and the current one are using + * the same fragment shading rate. + */ + anv_batch_emit(batch, GENX(PIPE_CONTROL), pc) { +#if GFX_VERx10 >= 125 + pc.PSSStallSyncEnable = true; +#else + pc.PSDSyncEnable = true; +#endif + } + + anv_batch_emit(batch, GENX(3DSTATE_CPS_POINTERS), cps) { + struct anv_device *device = pipeline->base.device; + + cps.CoarsePixelShadingStateArrayPointer = + get_cps_state_offset(device, cps_enable, fsr); + } +#endif +} +#endif /* GFX_VER >= 11 */ + const uint32_t genX(vk_to_intel_blend)[] = { [VK_BLEND_FACTOR_ZERO] = BLENDFACTOR_ZERO, [VK_BLEND_FACTOR_ONE] = BLENDFACTOR_ONE,
