URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a939d82a5207644fac48e583773a1a71d19e72ec
Author: José Roberto de Souza <[email protected]>
Date: Fri Oct 21 12:14:34 2022 -0700
hasvk: Nuke code around local memory
Reviewed-by: Ivan Briano <[email protected]>
None of the platforms supported by this driver supports local memory.
Signed-off-by: José Roberto de Souza <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fdbb005984e089a9338a7d693db13cd2c88612cb
Author: António Monteiro <[email protected]>
Date: Sun Oct 23 17:01:00 2022 +0100
freedreno: get timestamp from os_time_get_nano instead of os_time_get
Signed-off-by: António Monteiro <[email protected]>
Reviewed-by: Rob Clark <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19260>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=851c6598bd1262fa3debd1ed2c7337ad2ca75fc2
Author: Yusuf Khan <[email protected]>
Date: Wed Oct 19 04:14:15 2022 -0500
nouveau: get timestamp from os_time_get_nano instead of os_time_get
Signed-off-by: Yusuf Khan <[email protected]>
Reviewed-by: Karol Herbst <[email protected]>
Acked-by: Yonggang Luo <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19249>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1d41dd42dfbc9bfb056d68ba8c1c4205bdb9dc75
Author: Jan Beich <[email protected]>
Date: Wed Oct 19 19:43:35 2022 +0000
util: unify FreeBSD futex_wait signature with Linux/OpenBSD/Windows
src/util/futex.c:73:5: error: conflicting types for 'futex_wait'
int futex_wait(uint32_t *addr, int32_t value, struct timespec *timeout)
^
src/util/futex.h:50:5: note: previous declaration is here
int futex_wait(uint32_t *addr, int32_t value, const struct timespec
*timeout);
^
Fixes: 095dfc6caa29 ("util: Move the implementation of futex_wake and
futex_wait from futex.h to futex.c")
Reviewed-by: Jesse Natalie <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19177>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=813d502d7c4b297689c16b2559e87134db1ff0b5
Author: Mike Blumenkrantz <[email protected]>
Date: Fri Oct 14 15:18:00 2022 -0400
driconf: add mesa_glthread=false for gfxbench
this seems to hurt perf
Reviewed-by: Marek Olšák <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19081>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=55d2b82cc09953b104d46edc12524945e82eb45f
Author: Dave Airlie <[email protected]>
Date: Tue Feb 1 17:49:25 2022 +1000
glsl/types: fix dword slots calc for float16 matricies.
The current uniform query uploader for mat3 calcs things as
if the vector elements are f16vec4 wide, so fix the calcs
here to do the same.
Fixes GTF-GL46.gtf21.GL.mat3.mat3arraysimple_frag on llvmpipe
when 16-bit uniform lowering is allowed.
Reviewed-by: Marek Olšák <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14817>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3570e94bcc187512490ac0871086fb101dc1c9d6
Author: Alyssa Rosenzweig <[email protected]>
Date: Sat Oct 22 14:17:54 2022 -0400
agx: Use agx_nir_opt_preamble
Now that everything is in place, we can actually take advantage of
preambles. This wins us a crude form of UBO pushing (accounting for most
of the win here), as well as its intended purpose of optimizing
uniform-on-uniform arithmetic.
shader-db results are excellent. The shader that's regressed for instruction
count is a fragment shader that solely consists of `gl_FragColor = uniform`,
which goes from a vectorized UBO load to four scalar moves. That's more
instructions (and more bytes) but presumably faster, since ALU should be
much
cheaper than load/store.
total instructions in shared programs: 6502 -> 5764 (-11.35%)
instructions in affected programs: 5136 -> 4398 (-14.37%)
helped: 60
HURT: 1
helped stats (abs) min: 2.0 max: 47.0 x̄: 12.33 x̃: 8
helped stats (rel) min: 0.84% max: 34.48% x̄: 18.69% x̃: 21.05%
HURT stats (abs) min: 2.0 max: 2.0 x̄: 2.00 x̃: 2
HURT stats (rel) min: 33.33% max: 33.33% x̄: 33.33% x̃: 33.33%
95% mean confidence interval for instructions value: -14.69 -9.51
95% mean confidence interval for instructions %-change: -20.49% -15.20%
Instructions are helped.
total bytes in shared programs: 42186 -> 38310 (-9.19%)
bytes in affected programs: 33182 -> 29306 (-11.68%)
helped: 60
HURT: 1
helped stats (abs) min: 10.0 max: 272.0 x̄: 64.83 x̃: 50
helped stats (rel) min: 0.72% max: 30.00% x̄: 15.16% x̃: 16.67%
HURT stats (abs) min: 14.0 max: 14.0 x̄: 14.00 x̃: 14
HURT stats (rel) min: 31.82% max: 31.82% x̄: 31.82% x̃: 31.82%
95% mean confidence interval for bytes value: -77.73 -49.35
95% mean confidence interval for bytes %-change: -16.66% -12.11%
Bytes are helped.
total halfregs in shared programs: 2370 -> 1639 (-30.84%)
halfregs in affected programs: 1804 -> 1073 (-40.52%)
helped: 60
HURT: 0
helped stats (abs) min: 1.0 max: 40.0 x̄: 12.18 x̃: 8
helped stats (rel) min: 3.85% max: 72.73% x̄: 41.37% x̃: 36.17%
95% mean confidence interval for halfregs value: -14.77 -9.60
95% mean confidence interval for halfregs %-change: -46.00% -36.75%
Halfregs are helped.
Total CPU time (seconds): 2.71 -> 2.80 (3.32%)
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5e8b0289c35ef8d8c4098125e6951d6903585e33
Author: Alyssa Rosenzweig <[email protected]>
Date: Sun Sep 25 20:03:26 2022 -0400
agx: Add agx_nir_opt_preamble pass
This pass creates preamble shaders. The heavylifting is done by
nir_opt_preamble. We do need to define the cost model for nir_opt_preamble,
set
up 16-bit units for the register file, and scalarize the resulting
load/store_preamble intrinsics.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=328eef2c3c1aec6eb750e8eca496208d394f461f
Author: Alyssa Rosenzweig <[email protected]>
Date: Sat Oct 22 10:37:10 2022 -0400
asahi: Set GPR count accurately
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=afa20a840bcef5d2fd14f10350838e76203a9fbf
Author: Alyssa Rosenzweig <[email protected]>
Date: Sat Oct 22 10:37:04 2022 -0400
asahi: Set uniform counts accurately
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ec9eae99b133f8bc34714eda182d0d3df19b5ada
Author: Alyssa Rosenzweig <[email protected]>
Date: Thu Oct 20 22:15:54 2022 -0400
agx: Report GPRs to the driver
This needs to be passed onto the hardware.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6e32826345ade622ad05abb3aea652ecc089e652
Author: Alyssa Rosenzweig <[email protected]>
Date: Thu Oct 20 21:45:23 2022 -0400
agx: Avoid reading high uniforms from device_load
This does not seem to be possible architecturally. Exhaustively checked
all bits of the encoding. Avoids regressing
dEQP-GLES3.functional.texture.units.8_units.only_2d.0
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5bd245d2cd9e1b4c6552432bdf09a1fd8cc68306
Author: Alyssa Rosenzweig <[email protected]>
Date: Thu Oct 20 21:02:20 2022 -0400
agx: Handle 64-bit moves
lower_resinfo generates some 64-bit math, so we need to handle it. Even
though we don't have native 64-bit moves, it's convenient to pretend we
do to avoid special cases in the IR. In particular, modelling 64-bit
mov_imm in the IR means our existing small constant propagation code
works, with zero-extension from 8->64.
Fixes dEQP-GLES3.functional.texture.units.2_units.only_2d_array.*
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1521d9c58c1d9a3bbaf1f572920e5a7cbb1da4d3
Author: Alyssa Rosenzweig <[email protected]>
Date: Sun Sep 25 20:08:52 2022 -0400
agx: Restrict copyprop of uniforms
Some instructions don't accept uniform registers as sources (yet?),
avoid this hazard in the optimizer.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=cef13f8ab19a6261b9fa5065864fbb9ceecdbf7d
Author: Alyssa Rosenzweig <[email protected]>
Date: Sun Sep 25 20:07:26 2022 -0400
agx: Handle uniforms passed to COLLECT
It's useful to be able to copyprop uniform registers into COLLECT. That
requires handling of uniform registers in the parallel copy lowering,
which isn't too hard to add.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=056280a4a162bf4e43c2d4439dccaeb818e8698a
Author: Alyssa Rosenzweig <[email protected]>
Date: Sun Sep 25 20:02:48 2022 -0400
agx: Implement scalar load/store_preamble
These need to copy values between GPRs and uniform registers. This is pretty
easy in either direction. This implements scalar versions of the
intrinsics. A
backend NIR pass will scalarize for us.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=14fe5bc59828729436decf1a21d02dcecdba5f2b
Author: Alyssa Rosenzweig <[email protected]>
Date: Sun Sep 25 20:57:24 2022 -0400
agx: Strengthen assert for packing ld/st instructions
We really need to autogenerate the packing code... It's on the todo
list, currently in discussions on how to best go about this.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=41b54d4a5840f2a526aede98aec8f60f15339e77
Author: Alyssa Rosenzweig <[email protected]>
Date: Sun Sep 25 14:20:15 2022 -0400
agx: Allow larger indices for ld/st
For memory load/store instructions, the immediate is 16-bit, not 8-bit
like for ALUs.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=05009d1dad36d2324c83f93395848e4560e6d67e
Author: Alyssa Rosenzweig <[email protected]>
Date: Sun Sep 25 20:08:20 2022 -0400
agx: Add uniform_store instruction
Moves data from GPRs to uniform registers. Encoded like load/store
instructions, so reuse the device_load packing code.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ca4fe9d3f58bad7f12eb926f8fe1b808b39318a3
Author: Alyssa Rosenzweig <[email protected]>
Date: Sun Sep 25 20:55:26 2022 -0400
agx: Align preamble shaders
I don't know if it's ok to have unaligned programs, let's not risk it.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e466a7d1d898691a302fa3af9a9c4579a182bbbe
Author: Alyssa Rosenzweig <[email protected]>
Date: Sun Sep 25 12:42:46 2022 -0400
agx: Handle multiple functions
Needed for preambles. Make agx_context map to nir_function_impl and
the (out, key, binary) triple the only global shader state.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=af74e746cd328138c83896ed9eb24b919f7164f4
Author: Alyssa Rosenzweig <[email protected]>
Date: Sun Sep 25 19:58:06 2022 -0400
agx: Make push_count public
The driver needs to plumb this information into the hardware. It will
also make it easier to preserve across preamble/main function in a
moment.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2d63864e030c927857df7f57dde716f27aa29f50
Author: Alyssa Rosenzweig <[email protected]>
Date: Sun Sep 25 19:26:58 2022 -0400
agx: Check that we don't push too much
Currently we don't have a good mechanism for this other than being
careful... assert() at least. The long term plan is to lift the
UBO/VBO lowerings into NIR, making the sysval requirements visible in
the NIR. (And possibly moving to a descriptor set model to better match
Vulkan? I need to talk to jekstrand about what we want to do here long
term.)
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c74d6c4f9e0a4a03499784663656966fa9c95040
Author: Alyssa Rosenzweig <[email protected]>
Date: Sun Sep 25 14:16:31 2022 -0400
agx: Be less sloppy about high uniforms
We need 9-bits to index into the uniform file. Fix an overflow and add
some asserts to try to catch these issues earlier.
Sigh, C.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a0da23d5209acfd017c750840da232c0693deffe
Author: Alyssa Rosenzweig <[email protected]>
Date: Sun Sep 25 19:50:16 2022 -0400
asahi: Support preamble shaders
Extend the compiler/driver ABI to attach preambles, and plumb them into
the USC hardware when needed. This is the easy part!
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9061e960b2e4c4c8b10af54e37e35f07dc7bc501
Author: Alyssa Rosenzweig <[email protected]>
Date: Sat Oct 22 10:28:47 2022 -0400
asahi: Add group tests
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8b464f4c598eff0be04afe05c782ac63e2cb22d0
Author: Alyssa Rosenzweig <[email protected]>
Date: Sat Oct 22 10:00:12 2022 -0400
asahi: Don't use unnecessary test fixture
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=537a77ea6b4aed5fe0030fa5b8c3b3b3aae3a0ac
Author: Alyssa Rosenzweig <[email protected]>
Date: Sat Oct 22 09:59:50 2022 -0400
asahi: Rename LOD clamps tests to fit other packing
We'll use for testing the "groups" encoding.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6195ac93d6b7acc1284eb0608ca4b3e4150e4519
Author: Alyssa Rosenzweig <[email protected]>
Date: Thu Oct 20 21:11:02 2022 -0400
asahi: Use USC_UNIFORM_HIGH
Abstract it away so we get access to the full uniform file without
special cases.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=348ac0f4a290245f32d0b8ddcbb4ad7559faafbe
Author: Alyssa Rosenzweig <[email protected]>
Date: Thu Oct 20 18:42:13 2022 -0400
asahi: Make agx_varyings a union
More accurate.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=721c4f21865ed29c534df09b5654f93445727320
Author: Alyssa Rosenzweig <[email protected]>
Date: Tue Oct 18 17:03:35 2022 -0400
asahi: Remove "padding" field
Trivial.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=06cb242a54ccb9b200c8a4b00a17417732ee152a
Author: Alyssa Rosenzweig <[email protected]>
Date: Thu Oct 13 23:08:11 2022 -0400
asahi: Identify more shader-related fields
The big discovery is the "number of uniform registers" field. I learned
about this one accidentally when my preamble shaders weren't working
right, because we had inadvertently hardcoded "at most 32 registers" :-)
In the course of identifying that field, I found that the pipeline
address is used as a tagged pointer, with some unknown field in the
bottom bits and alignment demanded. The XML is updated to account for
this.
I later found that there's also a "number of general purpose registers
used by the preamble shader" field. I missed this one first, because the
encoding is slightly different from the usual "number of general purpose
registers in the main shader" field. The specification is slightly
coarser. I don't know why the hardware needs that
information anyway -- occupancy of the preamble shader should be
irrelevant -- but it's not a big deal.
Finally I found that the "more than 4 textures?" bit is... not that. I
do not yet know what it is, but it is... not that.
These all use the new groups() modifier for GenXML
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=24bfa5af88d4227d254e4be29442c44f05bfad69
Author: Alyssa Rosenzweig <[email protected]>
Date: Sun Oct 16 20:47:18 2022 -0400
asahi: Identify "Uniform high" USC word
The start field in the Uniform USC word is only 8-bits, whereas 9-bits
are required to address the entire uniform register file. This other
word gets used for the high half, with start indexed from u128l in
the natural way.
Apparently spending the evening stuffing too many uniforms into Metal is
paying off.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0e1f9ca9f6991a96dbe4ba7b64cc7521a0cdc0da
Author: Alyssa Rosenzweig <[email protected]>
Date: Sun Jul 31 13:45:00 2022 -0400
asahi: Route shader-db stats to debug callback
This way multithreading works correctly in shader-db including CPU time
account.
Code from v3d via panfrost.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e126338394c8a605aeb0ea27d201e43b69fa4f59
Author: Alyssa Rosenzweig <[email protected]>
Date: Thu Jun 9 08:50:35 2022 -0400
asahi: Precompile for shader-db
This gets shader-db's runner working, in conjunction with a shader-db ./run
modified to set ASAHI_MESA_DEBUG=precompile. This flag triggers precompiles
of
all shaders witha default key so we can exercise the compiler.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=46ae8e659da932058ae509d9fc64b3cef3c4af7e
Author: Alyssa Rosenzweig <[email protected]>
Date: Thu Jun 9 09:42:58 2022 -0400
asahi: Remove AGX_FAKE_DEVICE environment variable
The proper way to fake a device on Linux will be drm-shim.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=13e90bebe10eb39016756e9cb23010dcbe24511a
Author: Alyssa Rosenzweig <[email protected]>
Date: Sat Oct 22 14:50:58 2022 -0400
agx: Remove command line compiler
It has not been used in quite some time but adds maintainence burden.
Its function is replaced by drm-shim in conjunction with shader-db's
./run, which goes through the actual driver.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=80de33cf6a8480d51ecde8d4b8d29d595e281fe7
Author: Alyssa Rosenzweig <[email protected]>
Date: Sat Sep 24 22:26:58 2022 -0400
nir/opt_preamble: Move load_texture_base_agx
nir_opt_preamble will be crucial to optimize out the lowering for array
textures on AGX, which involves this AGX-specific sysval.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Acked-by: Connor Abbott <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ba551d293fcc915071727b847bec21721899c77a
Author: Alyssa Rosenzweig <[email protected]>
Date: Thu Oct 20 22:42:39 2022 -0400
asahi: Hold a reference to BOs in a batch
Fixes GPU-side use after frees, e.g. in
dEQP-GLES2.functional.texture.vertex.2d.wrap.clamp_mirror
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19215>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=741dbadae09ef376c1b6176f195b73930d1294db
Author: Georg Lehmann <[email protected]>
Date: Mon Oct 10 13:56:51 2022 +0200
nir: Fix ifind_msb_rev constant folding.
For example if src0 is 0x80000000 we should return 1, not 0.
Signed-off-by: Georg Lehmann <[email protected]>
Reviewed-by: Ian Romanick <[email protected]>
Reviewed-by: Rhys Perry <[email protected]>
Fixes: a5747f8ab35 ("nir: add opcodes for *find_msb_rev and lowering")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18951>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=125741dbae82dea2faf8e594c877701e137e0141
Author: Georg Lehmann <[email protected]>
Date: Tue Oct 4 16:02:28 2022 +0200
nir/opt_algebraic: Optimize various find_msb_rev patterns.
From dxvk, dxil-spirv, fxc, dxc and others.
Totals from 177 (0.13% of 134913) affected shaders:
CodeSize: 1079504 -> 1059872 (-1.82%)
Instrs: 195381 -> 192269 (-1.59%)
Latency: 3664137 -> 3631951 (-0.88%)
InvThroughput: 599479 -> 585675 (-2.30%)
Signed-off-by: Georg Lehmann <[email protected]>
Reviewed-by: Rhys Perry <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18951>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d57f5c9cac8dce2460b246405d2176e1e2a1ba05
Author: Georg Lehmann <[email protected]>
Date: Tue Oct 4 15:44:16 2022 +0200
radv,aco: Lower uclz in NIR.
Signed-off-by: Georg Lehmann <[email protected]>
Reviewed-by: Rhys Perry <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18951>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7505be3497cba09bb0a3e3787aeb107f32eeeee2
Author: Georg Lehmann <[email protected]>
Date: Tue Oct 4 15:38:58 2022 +0200
nir/opt_algebraic: Add an option to lower uclz.
Signed-off-by: Georg Lehmann <[email protected]>
Reviewed-by: Ian Romanick <[email protected]>
Reviewed-by: Rhys Perry <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18951>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=049b60cf4bd2b16667a9d85ebe8a110a24236bc3
Author: Georg Lehmann <[email protected]>
Date: Tue Oct 4 15:24:59 2022 +0200
ac/llvm: Implement [ui]find_msb_rev.
Signed-off-by: Georg Lehmann <[email protected]>
Reviewed-by: Rhys Perry <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18951>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=058174c4ded714a047ce58dbbdc0eedc54a83d64
Author: Georg Lehmann <[email protected]>
Date: Tue Oct 4 15:08:06 2022 +0200
aco: Implement [ui]find_msb_rev.
Signed-off-by: Georg Lehmann <[email protected]>
Reviewed-by: Rhys Perry <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18951>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1e552b9c95a1fc8cbec5f6187bf8630b3c31cc25
Author: Georg Lehmann <[email protected]>
Date: Tue Oct 4 14:32:50 2022 +0200
nir/opt_algebraic: Mirror optimizations for find_msb_rev.
Signed-off-by: Georg Lehmann <[email protected]>
Reviewed-by: Ian Romanick <[email protected]>
Reviewed-by: Rhys Perry <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18951>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b5ecb5388e7ef2e0c77ebcd1b2f2c708a1170179
Author: Konstantin Seurer <[email protected]>
Date: Thu Oct 20 20:54:26 2022 +0200
radv/rt: Fix setting tmax for opaque AABBs
data->vars->tmax will be overwritten by inner_vars.tmax so we have to
set inner_vars.tmax instead. This probably doesn't affect anything in
practise.
cc: mesa-stable
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19207>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=22f7f167cdafe0facbab2ba2a89f5aadccc39dc5
Author: Emma Anholt <[email protected]>
Date: Wed Oct 19 15:54:18 2022 -0700
nir/opt_phi_precision: Fix missing swizzles when narrowing phi srcs.
This NIR:
vec4 32 ssa_169 = phi block_1: ssa_168, block_2: ssa_138
vec1 16 ssa_209 = f2fmp ssa_169.x
vec1 16 ssa_210 = f2fmp ssa_169.y
vec1 16 ssa_211 = f2fmp ssa_169.z
vec1 16 ssa_212 = f2fmp ssa_169.w
vec4 16 ssa_213 = vec4 ssa_209, ssa_210, ssa_211, ssa_212
intrinsic store_output (ssa_213, ssa_171) (base=0, wrmask=xyzw /*15*/,
component=0, src_type=float16 /*144*/, io location=4 slots=1 mediump
/*8388740*/, xfb() /*0*/, xfb2() /*0*/)
would turn into:
vec4 32 ssa_169 = phi block_1: ssa_168, block_2: ssa_138
vec4 16 ssa_216 = phi block_1: ssa_214, block_2: ssa_215
vec1 16 ssa_209 = f2fmp ssa_169.x
vec1 16 ssa_210 = f2fmp ssa_169.y
vec1 16 ssa_211 = f2fmp ssa_169.z
vec1 16 ssa_212 = f2fmp ssa_169.w
vec4 16 ssa_213 = vec4 ssa_216.x, ssa_216.x, ssa_216.x, ssa_216.x
intrinsic store_output (ssa_213, ssa_171) (base=0, wrmask=xyzw /*15*/,
component=0, src_type=float16 /*144*/, io location=4 slots=1 mediump
/*8388740*/, xfb() /*0*/, xfb2() /*0*/)
ignoring the swizzles from the f2fmp srcs. Fixes failures in
dEQP-GLES2.functional.shaders.random.all_features.fragment.20 on
turnip+ANGLE.
Fixes: c7b935962b27 ("nir: Add pass to lower phi precision")
Reviewed-by: Connor Abbott <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19179>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=783b416e651df6d9d1c395989507cfc5b516003c
Author: Yonggang Luo <[email protected]>
Date: Fri Oct 21 21:36:24 2022 +0800
ci/macos: Building both dri and xlib version of glx
Signed-off-by: Yonggang Luo <[email protected]>
Reviewed-by: Adam Jackson <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19221>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6c9f8d866202819780a4fa5398e0898b123a0abc
Author: Yonggang Luo <[email protected]>
Date: Fri Oct 21 22:07:37 2022 +0800
xlib: Remove macro guard with GLX_INDIRECT_RENDERING in xlib.c
According meson about with_glx == 'xlib' check only defied '-DUSE_XSHM',
so the macro check GLX_INDIRECT_RENDERING make no-sense, removed it.
Signed-off-by: Yonggang Luo <[email protected]>
Reviewed-by: Adam Jackson <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19221>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5bed3d4ad659c30cb0ef4b40172f1aab877ccc98
Author: Yonggang Luo <[email protected]>
Date: Fri Oct 21 19:17:08 2022 +0800
meson: with_glx never assigned to 'gallium-xlib', remove 'gallium-xlib'
Signed-off-by: Yonggang Luo <[email protected]>
Reviewed-by: Eric Engestrom <[email protected]>
Reviewed-by: Adam Jackson <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19221>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=814682d00c7f016497afe52cd5c6e86f00110d7c
Author: Yonggang Luo <[email protected]>
Date: Fri Oct 21 19:16:28 2022 +0800
meson: with_glx never assigned to 'gallium-xlib', so need add with_glx ==
'xlib' for dep_glproto
Fixes: 76791db0882b3715cd7d ("mesa/x11: Remove the swrast-classic-based
fake libGL")
Signed-off-by: Yonggang Luo <[email protected]>
Reviewed-by: Eric Engestrom <[email protected]>
Reviewed-by: Adam Jackson <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19221>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9a7e93f1f6b42ff301dc3031ea0002253e61a6a5
Author: Thomas H.P. Andersen <[email protected]>
Date: Tue Oct 18 04:25:01 2022 +0200
vulkan: drop const for descriptor set
drivers should be able to update the reference count
member of the vk_descriptor_set_layout struct
Reviewed-by: Jason Ekstrand <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19132>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5aa437a9f11cb029a52cce90d40fd2c238513107
Author: Mike Blumenkrantz <[email protected]>
Date: Thu Oct 20 13:00:30 2022 -0400
zink: fix ds3 line stipple enable handling
ds3 can be used without line stipple enable if the driver doesn't support
line stipple, so this needs special-casing
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19204>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=12fded59650c26ae831663568e3d2981f5195b7f
Author: Mike Blumenkrantz <[email protected]>
Date: Thu Oct 20 13:00:06 2022 -0400
zink: fix duplicate VK_DYNAMIC_STATE_LINE_STIPPLE_EXT setting
if ds3 is used, this is already set above
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19204>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9de7e49e6f015aa070338faffac439f2fa60b09b
Author: Alyssa Rosenzweig <[email protected]>
Date: Wed Oct 5 12:12:47 2022 -0400
panfrost: Remove NIR_SERIALIZED support
Only used by Clover (due to the dynamic pipeloader), which we never
shipped support for. We'll do OpenCL via Rusticl, which does not use the
dynamic pipeloader.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Acked-by: Jason Ekstrand <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18972>
