Module: Mesa
Branch: main
Commit: 7e1b804992d6f0d906ca2bce859e7b37b1f3ffbd
URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7e1b804992d6f0d906ca2bce859e7b37b1f3ffbd

Author: Qiang Yu <[email protected]>
Date:   Fri Jul 22 20:01:26 2022 +0800

radeonsi: implement two lds base load intrinsics

LDS will be accessed starting from esgs_ring which has offset 0.
So ngg_scratch and ngg_emit base address is just the offset from
the esgs_ring base.

Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: Qiang Yu <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17109>

---

 src/amd/llvm/ac_nir_to_llvm.c                 | 2 ++
 src/gallium/drivers/radeonsi/si_shader_llvm.c | 6 ++++++
 2 files changed, 8 insertions(+)

diff --git a/src/amd/llvm/ac_nir_to_llvm.c b/src/amd/llvm/ac_nir_to_llvm.c
index 8b3dff9782a..310aa29a378 100644
--- a/src/amd/llvm/ac_nir_to_llvm.c
+++ b/src/amd/llvm/ac_nir_to_llvm.c
@@ -3645,6 +3645,8 @@ static bool visit_intrinsic(struct ac_nir_context *ctx, 
nir_intrinsic_instr *ins
    case nir_intrinsic_load_prim_gen_query_enabled_amd:
    case nir_intrinsic_load_prim_xfb_query_enabled_amd:
    case nir_intrinsic_load_clamp_vertex_color_amd:
+   case nir_intrinsic_load_lds_ngg_scratch_base_amd:
+   case nir_intrinsic_load_lds_ngg_gs_out_vertex_base_amd:
       result = ctx->abi->intrinsic_load(ctx->abi, instr->intrinsic);
       break;
    case nir_intrinsic_load_user_clip_plane:
diff --git a/src/gallium/drivers/radeonsi/si_shader_llvm.c 
b/src/gallium/drivers/radeonsi/si_shader_llvm.c
index ea61cdd1e2c..94abe102a11 100644
--- a/src/gallium/drivers/radeonsi/si_shader_llvm.c
+++ b/src/gallium/drivers/radeonsi/si_shader_llvm.c
@@ -922,6 +922,12 @@ static LLVMValueRef si_llvm_load_intrinsic(struct 
ac_shader_abi *abi, nir_intrin
    case nir_intrinsic_load_ring_attr_amd:
       return si_llvm_build_attr_ring_desc(ctx);
 
+   case nir_intrinsic_load_lds_ngg_scratch_base_amd:
+      return LLVMBuildBitCast(ctx->ac.builder, ctx->gs_ngg_scratch.value, 
ctx->ac.i32, "");
+
+   case nir_intrinsic_load_lds_ngg_gs_out_vertex_base_amd:
+      return LLVMBuildBitCast(ctx->ac.builder, ctx->gs_ngg_emit, ctx->ac.i32, 
"");
+
    default:
       return NULL;
    }

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