Module: Mesa Branch: main Commit: 7f97cd04c971649a27e664afbc0b4ed13d7102f7 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7f97cd04c971649a27e664afbc0b4ed13d7102f7
Author: Jason Ekstrand <[email protected]> Date: Fri Sep 2 22:46:56 2022 -0500 hasvk: Rip out remaining traces of CPS/FSR Reviewed-by: Lionel Landwerlin <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19852> --- src/intel/vulkan_hasvk/anv_device.c | 70 -------------------------- src/intel/vulkan_hasvk/anv_pipeline.c | 92 +---------------------------------- src/intel/vulkan_hasvk/anv_private.h | 10 ---- 3 files changed, 1 insertion(+), 171 deletions(-) diff --git a/src/intel/vulkan_hasvk/anv_device.c b/src/intel/vulkan_hasvk/anv_device.c index 825d144cc05..489b90715d5 100644 --- a/src/intel/vulkan_hasvk/anv_device.c +++ b/src/intel/vulkan_hasvk/anv_device.c @@ -3275,7 +3275,6 @@ void anv_DestroyDevice( anv_state_reserved_pool_finish(&device->custom_border_colors); anv_state_pool_free(&device->dynamic_state_pool, device->border_colors); anv_state_pool_free(&device->dynamic_state_pool, device->slice_hash); - anv_state_pool_free(&device->dynamic_state_pool, device->cps_states); #endif anv_scratch_pool_finish(device, &device->scratch_pool); @@ -4491,72 +4490,3 @@ vk_icdNegotiateLoaderICDInterfaceVersion(uint32_t* pSupportedVersion) *pSupportedVersion = MIN2(*pSupportedVersion, 5u); return VK_SUCCESS; } - -VkResult anv_GetPhysicalDeviceFragmentShadingRatesKHR( - VkPhysicalDevice physicalDevice, - uint32_t* pFragmentShadingRateCount, - VkPhysicalDeviceFragmentShadingRateKHR* pFragmentShadingRates) -{ - ANV_FROM_HANDLE(anv_physical_device, physical_device, physicalDevice); - VK_OUTARRAY_MAKE_TYPED(VkPhysicalDeviceFragmentShadingRateKHR, out, - pFragmentShadingRates, pFragmentShadingRateCount); - -#define append_rate(_samples, _width, _height) \ - do { \ - vk_outarray_append_typed(VkPhysicalDeviceFragmentShadingRateKHR, &out, __r) { \ - __r->sampleCounts = _samples; \ - __r->fragmentSize = (VkExtent2D) { \ - .width = _width, \ - .height = _height, \ - }; \ - } \ - } while (0) - - VkSampleCountFlags sample_counts = - isl_device_get_sample_counts(&physical_device->isl_dev); - - /* BSpec 47003: There are a number of restrictions on the sample count - * based off the coarse pixel size. - */ - static const VkSampleCountFlags cp_size_sample_limits[] = { - [1] = ISL_SAMPLE_COUNT_16_BIT | ISL_SAMPLE_COUNT_8_BIT | - ISL_SAMPLE_COUNT_4_BIT | ISL_SAMPLE_COUNT_2_BIT | ISL_SAMPLE_COUNT_1_BIT, - [2] = ISL_SAMPLE_COUNT_4_BIT | ISL_SAMPLE_COUNT_2_BIT | ISL_SAMPLE_COUNT_1_BIT, - [4] = ISL_SAMPLE_COUNT_4_BIT | ISL_SAMPLE_COUNT_2_BIT | ISL_SAMPLE_COUNT_1_BIT, - [8] = ISL_SAMPLE_COUNT_2_BIT | ISL_SAMPLE_COUNT_1_BIT, - [16] = ISL_SAMPLE_COUNT_1_BIT, - }; - - for (uint32_t x = 4; x >= 1; x /= 2) { - for (uint32_t y = 4; y >= 1; y /= 2) { - if (physical_device->info.has_coarse_pixel_primitive_and_cb) { - /* BSpec 47003: - * "CPsize 1x4 and 4x1 are not supported" - */ - if ((x == 1 && y == 4) || (x == 4 && y == 1)) - continue; - - /* For size {1, 1}, the sample count must be ~0 - * - * 4x2 is also a specially case. - */ - if (x == 1 && y == 1) - append_rate(~0, x, y); - else if (x == 4 && y == 2) - append_rate(ISL_SAMPLE_COUNT_1_BIT, x, y); - else - append_rate(cp_size_sample_limits[x * y], x, y); - } else { - /* For size {1, 1}, the sample count must be ~0 */ - if (x == 1 && y == 1) - append_rate(~0, x, y); - else - append_rate(sample_counts, x, y); - } - } - } - -#undef append_rate - - return vk_outarray_status(&out); -} diff --git a/src/intel/vulkan_hasvk/anv_pipeline.c b/src/intel/vulkan_hasvk/anv_pipeline.c index 5529fd52976..328263099d4 100644 --- a/src/intel/vulkan_hasvk/anv_pipeline.c +++ b/src/intel/vulkan_hasvk/anv_pipeline.c @@ -113,7 +113,6 @@ anv_shader_stage_to_nir(struct anv_device *device, .vk_memory_model = true, .vk_memory_model_device_scope = true, .workgroup_memory_explicit_layout = true, - .fragment_shading_rate = pdevice->info.ver >= 11, }, .ubo_addr_format = anv_nir_ubo_addr_format(pdevice, device->robust_buffer_access), @@ -344,64 +343,11 @@ populate_gs_prog_key(const struct anv_device *device, populate_base_prog_key(device, robust_buffer_acccess, &key->base); } -static bool -pipeline_has_coarse_pixel(const struct anv_graphics_pipeline *pipeline, - const BITSET_WORD *dynamic, - const struct vk_multisample_state *ms, - const struct vk_fragment_shading_rate_state *fsr) -{ - /* The Vulkan 1.2.199 spec says: - * - * "If any of the following conditions are met, Cxy' must be set to - * {1,1}: - * - * * If Sample Shading is enabled. - * * [...]" - * - * And "sample shading" is defined as follows: - * - * "Sample shading is enabled for a graphics pipeline: - * - * * If the interface of the fragment shader entry point of the - * graphics pipeline includes an input variable decorated with - * SampleId or SamplePosition. In this case minSampleShadingFactor - * takes the value 1.0. - * - * * Else if the sampleShadingEnable member of the - * VkPipelineMultisampleStateCreateInfo structure specified when - * creating the graphics pipeline is set to VK_TRUE. In this case - * minSampleShadingFactor takes the value of - * VkPipelineMultisampleStateCreateInfo::minSampleShading. - * - * Otherwise, sample shading is considered disabled." - * - * The first bullet above is handled by the back-end compiler because those - * inputs both force per-sample dispatch. The second bullet is handled - * here. Note that this sample shading being enabled has nothing to do - * with minSampleShading. - */ - if (ms != NULL && ms->sample_shading_enable) - return false; - - /* Not dynamic & pipeline has a 1x1 fragment shading rate with no - * possibility for element of the pipeline to change the value. - */ - if (!BITSET_TEST(dynamic, MESA_VK_DYNAMIC_FSR) && - fsr->fragment_size.width <= 1 && - fsr->fragment_size.height <= 1 && - fsr->combiner_ops[0] == VK_FRAGMENT_SHADING_RATE_COMBINER_OP_KEEP_KHR && - fsr->combiner_ops[1] == VK_FRAGMENT_SHADING_RATE_COMBINER_OP_KEEP_KHR) - return false; - - return true; -} - static void populate_wm_prog_key(const struct anv_graphics_pipeline *pipeline, bool robust_buffer_acccess, const BITSET_WORD *dynamic, const struct vk_multisample_state *ms, - const struct vk_fragment_shading_rate_state *fsr, const struct vk_render_pass_state *rp, struct brw_wm_prog_key *key) { @@ -449,11 +395,6 @@ populate_wm_prog_key(const struct anv_graphics_pipeline *pipeline, if (device->physical->instance->sample_mask_out_opengl_behaviour) key->ignore_sample_mask_out = !key->multisample_fbo; } - - key->coarse_pixel = - !key->persample_interp && - device->vk.enabled_extensions.KHR_fragment_shading_rate && - pipeline_has_coarse_pixel(pipeline, dynamic, ms, fsr); } static void @@ -1195,7 +1136,7 @@ anv_graphics_pipeline_init_keys(struct anv_graphics_pipeline *pipeline, case MESA_SHADER_FRAGMENT: { populate_wm_prog_key(pipeline, pipeline->base.device->robust_buffer_access, - state->dynamic, state->ms, state->fsr, state->rp, + state->dynamic, state->ms, state->rp, &stages[s].key.wm); break; } @@ -1460,37 +1401,6 @@ anv_graphics_pipeline_compile(struct anv_graphics_pipeline *pipeline, prev_stage = &stages[s]; } - /* In the case the platform can write the primitive variable shading rate, - * figure out the last geometry stage that should write the primitive - * shading rate, and ensure it is marked as used there. The backend will - * write a default value if the shader doesn't actually write it. - * - * We iterate backwards in the stage and stop on the first shader that can - * set the value. - */ - const struct intel_device_info *devinfo = pipeline->base.device->info; - if (devinfo->has_coarse_pixel_primitive_and_cb && - stages[MESA_SHADER_FRAGMENT].info && - stages[MESA_SHADER_FRAGMENT].key.wm.coarse_pixel && - !stages[MESA_SHADER_FRAGMENT].nir->info.fs.uses_sample_shading) { - struct anv_pipeline_stage *last_psr = NULL; - - for (unsigned i = 0; i < ARRAY_SIZE(graphics_shader_order); i++) { - gl_shader_stage s = - graphics_shader_order[ARRAY_SIZE(graphics_shader_order) - i - 1]; - - if (!stages[s].info || - !gl_shader_stage_can_set_fragment_shading_rate(s)) - continue; - - last_psr = &stages[s]; - break; - } - - assert(last_psr); - last_psr->nir->info.outputs_written |= VARYING_BIT_PRIMITIVE_SHADING_RATE; - } - prev_stage = NULL; for (unsigned i = 0; i < ARRAY_SIZE(graphics_shader_order); i++) { gl_shader_stage s = graphics_shader_order[i]; diff --git a/src/intel/vulkan_hasvk/anv_private.h b/src/intel/vulkan_hasvk/anv_private.h index 40069f54c61..a014b31b718 100644 --- a/src/intel/vulkan_hasvk/anv_private.h +++ b/src/intel/vulkan_hasvk/anv_private.h @@ -1162,16 +1162,6 @@ struct anv_device { struct anv_state slice_hash; - /** An array of CPS_STATE structures grouped by MAX_VIEWPORTS elements - * - * We need to emit CPS_STATE structures for each viewport accessible by a - * pipeline. So rather than write many identical CPS_STATE structures - * dynamically, we can enumerate all possible combinaisons and then just - * emit a 3DSTATE_CPS_POINTERS instruction with the right offset into this - * array. - */ - struct anv_state cps_states; - uint32_t queue_count; struct anv_queue * queues;
