Module: Mesa
Branch: main
Commit: ce57cc4397802ccb83f8c89e93d0be0fde22da53
URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ce57cc4397802ccb83f8c89e93d0be0fde22da53

Author: Jason Ekstrand <[email protected]>
Date:   Fri Sep  2 22:33:34 2022 -0500

hasvk/blorp: Rip out SKL+

Reviewed-by: Lionel Landwerlin <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19852>

---

 src/intel/vulkan_hasvk/genX_blorp_exec.c | 32 --------------------------------
 1 file changed, 32 deletions(-)

diff --git a/src/intel/vulkan_hasvk/genX_blorp_exec.c 
b/src/intel/vulkan_hasvk/genX_blorp_exec.c
index 819c3f6d192..85e297acbe7 100644
--- a/src/intel/vulkan_hasvk/genX_blorp_exec.c
+++ b/src/intel/vulkan_hasvk/genX_blorp_exec.c
@@ -124,7 +124,6 @@ blorp_get_surface_address(struct blorp_batch *blorp_batch,
    }
 }
 
-#if GFX_VER >= 7 && GFX_VER < 10
 static struct blorp_address
 blorp_get_surface_base_address(struct blorp_batch *batch)
 {
@@ -134,7 +133,6 @@ blorp_get_surface_base_address(struct blorp_batch *batch)
       .offset = 0,
    };
 }
-#endif
 
 static void *
 blorp_alloc_dynamic_state(struct blorp_batch *batch,
@@ -282,21 +280,6 @@ blorp_exec_on_render(struct blorp_batch *batch,
    struct anv_cmd_buffer *cmd_buffer = batch->driver_batch;
    assert(cmd_buffer->queue_family->queueFlags & VK_QUEUE_GRAPHICS_BIT);
 
-#if GFX_VER >= 11
-   /* The PIPE_CONTROL command description says:
-    *
-    *    "Whenever a Binding Table Index (BTI) used by a Render Target Message
-    *     points to a different RENDER_SURFACE_STATE, SW must issue a Render
-    *     Target Cache Flush by enabling this bit. When render target flush
-    *     is set due to new association of BTI, PS Scoreboard Stall bit must
-    *     be set in this packet."
-    */
-   anv_add_pending_pipe_bits(cmd_buffer,
-                             ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT |
-                             ANV_PIPE_STALL_AT_SCOREBOARD_BIT,
-                             "before blorp BTI change");
-#endif
-
    genX(flush_pipeline_select_3d)(cmd_buffer);
 
    /* Apply any outstanding flushes in case pipeline select haven't. */
@@ -311,21 +294,6 @@ blorp_exec_on_render(struct blorp_batch *batch,
 
    blorp_exec(batch, params);
 
-#if GFX_VER >= 11
-   /* The PIPE_CONTROL command description says:
-    *
-    *    "Whenever a Binding Table Index (BTI) used by a Render Target Message
-    *     points to a different RENDER_SURFACE_STATE, SW must issue a Render
-    *     Target Cache Flush by enabling this bit. When render target flush
-    *     is set due to new association of BTI, PS Scoreboard Stall bit must
-    *     be set in this packet."
-    */
-   anv_add_pending_pipe_bits(cmd_buffer,
-                             ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT |
-                             ANV_PIPE_STALL_AT_SCOREBOARD_BIT,
-                             "after blorp BTI change");
-#endif
-
    /* Calculate state that does not get touched by blorp.
     * Flush everything else.
     */

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