Module: Mesa Branch: staging/22.3 Commit: 7bff9a867d3f979fe6a230635730b1c93c683aa7 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7bff9a867d3f979fe6a230635730b1c93c683aa7
Author: Kenneth Graunke <[email protected]> Date: Mon Jan 9 15:57:14 2023 -0800 intel/compiler: Drop redundant 32-bit expansion for shared float atomics We already expanded data to 32-bit a few lines earlier, so this is just redundantly doing it a second time. Fixes: 43169dbbe5f ("intel/compiler: Support 16 bit float ops") Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rohan Garg <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20604> (cherry picked from commit f7b29d792464b0224ae5155d15d48ab8e55840cb) --- .pick_status.json | 2 +- src/intel/compiler/brw_fs_nir.cpp | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 50930f1e5b5..638ffcbad10 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -94,7 +94,7 @@ "description": "intel/compiler: Drop redundant 32-bit expansion for shared float atomics", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "43169dbbe5f963ca47d51873f6639fbe3fd665b0" }, diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index ca5d2bc13fc..769077473c7 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -6109,7 +6109,7 @@ fs_visitor::nir_emit_shared_atomic(const fs_builder &bld, if (op == BRW_AOP_CMPWR) { fs_reg tmp = bld.vgrf(data.type, 2); fs_reg sources[2] = { - expand_to_32bit(bld, data), + data, expand_to_32bit(bld, get_nir_src(instr->src[2])) }; bld.LOAD_PAYLOAD(tmp, sources, 2, 0);
