Module: Mesa Branch: dev/transfer-fw-streams Commit: 7c2963c70b05e95706899ed58bd137b6ebbec169 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7c2963c70b05e95706899ed58bd137b6ebbec169
Author: Matt Coster <[email protected]> Date: Tue Feb 7 10:28:24 2023 +0000 pvr: Add firmware stream support for transfer submit Move transfer jobs over to the new firmware stream interface. This had already been done for render and compute jobs in 947e183ff55 ("pvr: Implement new firmware stream interface"). Signed-off-by: Matt Coster <[email protected]> Reviewed-by: Frank Binns <[email protected]> --- src/imagination/csbgen/rogue_cr.xml | 20 +++ src/imagination/vulkan/winsys/pvr_winsys.h | 19 ++- .../vulkan/winsys/pvrsrvkm/pvr_srv_job_transfer.c | 135 ++++++++++++++------- .../vulkan/winsys/pvrsrvkm/pvr_srv_job_transfer.h | 2 + 4 files changed, 129 insertions(+), 47 deletions(-) diff --git a/src/imagination/csbgen/rogue_cr.xml b/src/imagination/csbgen/rogue_cr.xml index 3477a77f6d7..706f662d6f3 100644 --- a/src/imagination/csbgen/rogue_cr.xml +++ b/src/imagination/csbgen/rogue_cr.xml @@ -479,6 +479,10 @@ SOFTWARE. <field name="y" start="0" end="9" type="uint"/> </struct> + <struct name="ISP_MTILE_BASE" length="2"> + <field name="addr" start="2" end="39" shift="2" type="address"/> + </struct> + <struct name="ISP_MTILE_SIZE" length="1"> <field name="x" start="16" end="25" type="uint"/> <field name="y" start="0" end="9" type="uint"/> @@ -641,4 +645,20 @@ SOFTWARE. <field name="width" start="0" end="1" type="PIXEL_WIDTH"/> </struct> + <struct name="USC_CLEAR_REGISTER0" length="1"> + <field name="val" start="0" end="31" type="uint"/> + </struct> + + <struct name="USC_CLEAR_REGISTER1" length="1"> + <field name="val" start="0" end="31" type="uint"/> + </struct> + + <struct name="USC_CLEAR_REGISTER2" length="1"> + <field name="val" start="0" end="31" type="uint"/> + </struct> + + <struct name="USC_CLEAR_REGISTER3" length="1"> + <field name="val" start="0" end="31" type="uint"/> + </struct> + </csbgen> diff --git a/src/imagination/vulkan/winsys/pvr_winsys.h b/src/imagination/vulkan/winsys/pvr_winsys.h index cb03f3727a9..16183cefe65 100644 --- a/src/imagination/vulkan/winsys/pvr_winsys.h +++ b/src/imagination/vulkan/winsys/pvr_winsys.h @@ -280,6 +280,17 @@ struct pvr_winsys_transfer_regs { uint32_t usc_pixel_output_ctrl; }; +struct pvr_winsys_transfer_cmd { + /* Firmware stream buffer. This is the maximum possible size taking into + * consideration all HW features. + */ + uint8_t fw_stream[172]; + uint32_t fw_stream_len; + + /* Must be 0 or a combination of PVR_WINSYS_TRANSFER_FLAG_* flags. */ + uint32_t flags; +}; + struct pvr_winsys_transfer_submit_info { uint32_t frame_num; uint32_t job_num; @@ -292,12 +303,7 @@ struct pvr_winsys_transfer_submit_info { uint32_t *stage_flags; uint32_t cmd_count; - struct { - struct pvr_winsys_transfer_regs regs; - - /* Must be 0 or a combination of PVR_WINSYS_TRANSFER_FLAG_* flags. */ - uint32_t flags; - } cmds[PVR_TRANSFER_MAX_PREPARES_PER_SUBMIT]; + struct pvr_winsys_transfer_cmd cmds[PVR_TRANSFER_MAX_PREPARES_PER_SUBMIT]; }; #define PVR_WINSYS_COMPUTE_FLAG_PREVENT_ALL_OVERLAP BITFIELD_BIT(0U) @@ -477,6 +483,7 @@ struct pvr_winsys_ops { VkResult (*transfer_submit)( const struct pvr_winsys_transfer_ctx *ctx, const struct pvr_winsys_transfer_submit_info *submit_info, + const struct pvr_device_info *dev_info, struct vk_sync *signal_sync); VkResult (*null_job_submit)(struct pvr_winsys *ws, diff --git a/src/imagination/vulkan/winsys/pvrsrvkm/pvr_srv_job_transfer.c b/src/imagination/vulkan/winsys/pvrsrvkm/pvr_srv_job_transfer.c index c3dca0a9bce..779301aeb97 100644 --- a/src/imagination/vulkan/winsys/pvrsrvkm/pvr_srv_job_transfer.c +++ b/src/imagination/vulkan/winsys/pvrsrvkm/pvr_srv_job_transfer.c @@ -29,6 +29,7 @@ #include "fw-api/pvr_rogue_fwif.h" #include "fw-api/pvr_rogue_fwif_rf.h" +#include "pvr_device_info.h" #include "pvr_private.h" #include "pvr_srv.h" #include "pvr_srv_bridge.h" @@ -129,59 +130,110 @@ void pvr_srv_winsys_transfer_ctx_destroy(struct pvr_winsys_transfer_ctx *ctx) vk_free(srv_ws->alloc, srv_ctx); } +static void +pvr_srv_transfer_cmd_stream_load(struct rogue_fwif_cmd_transfer *const cmd, + const uint8_t *const stream, + const uint32_t stream_len, + const struct pvr_device_info *const dev_info) +{ + const uint32_t *stream_ptr = (const uint32_t *)stream; + struct rogue_fwif_transfer_regs *const regs = &cmd->regs; + + regs->pds_bgnd0_base = *(uint64_t *)stream_ptr; + stream_ptr += pvr_cmd_length(CR_PDS_BGRND0_BASE); + + regs->pds_bgnd1_base = *(uint64_t *)stream_ptr; + stream_ptr += pvr_cmd_length(CR_PDS_BGRND1_BASE); + + regs->pds_bgnd3_sizeinfo = *(uint64_t *)stream_ptr; + stream_ptr += pvr_cmd_length(CR_PDS_BGRND3_SIZEINFO); + + regs->isp_mtile_base = *(uint64_t *)stream_ptr; + stream_ptr += pvr_cmd_length(CR_ISP_MTILE_BASE); + + STATIC_ASSERT(ARRAY_SIZE(regs->pbe_wordx_mrty) == 9U); + STATIC_ASSERT(sizeof(regs->pbe_wordx_mrty[0]) == sizeof(uint64_t)); + memcpy(regs->pbe_wordx_mrty, stream_ptr, sizeof(regs->pbe_wordx_mrty)); + stream_ptr += 9U * 2U; + + regs->isp_bgobjvals = *stream_ptr; + stream_ptr += pvr_cmd_length(CR_ISP_BGOBJVALS); + + regs->usc_pixel_output_ctrl = *stream_ptr; + stream_ptr += pvr_cmd_length(CR_USC_PIXEL_OUTPUT_CTRL); + + regs->usc_clear_register0 = *stream_ptr; + stream_ptr += pvr_cmd_length(CR_USC_CLEAR_REGISTER0); + + regs->usc_clear_register1 = *stream_ptr; + stream_ptr += pvr_cmd_length(CR_USC_CLEAR_REGISTER1); + + regs->usc_clear_register2 = *stream_ptr; + stream_ptr += pvr_cmd_length(CR_USC_CLEAR_REGISTER2); + + regs->usc_clear_register3 = *stream_ptr; + stream_ptr += pvr_cmd_length(CR_USC_CLEAR_REGISTER3); + + regs->isp_mtile_size = *stream_ptr; + stream_ptr += pvr_cmd_length(CR_ISP_MTILE_SIZE); + + regs->isp_render_origin = *stream_ptr; + stream_ptr += pvr_cmd_length(CR_ISP_RENDER_ORIGIN); + + regs->isp_ctl = *stream_ptr; + stream_ptr += pvr_cmd_length(CR_ISP_CTL); + + regs->isp_aa = *stream_ptr; + stream_ptr += pvr_cmd_length(CR_ISP_AA); + + regs->event_pixel_pds_info = *stream_ptr; + stream_ptr += pvr_cmd_length(CR_EVENT_PIXEL_PDS_INFO); + + regs->event_pixel_pds_code = *stream_ptr; + stream_ptr += pvr_cmd_length(CR_EVENT_PIXEL_PDS_CODE); + + regs->event_pixel_pds_data = *stream_ptr; + stream_ptr += pvr_cmd_length(CR_EVENT_PIXEL_PDS_DATA); + + regs->isp_render = *stream_ptr; + stream_ptr += pvr_cmd_length(CR_ISP_RENDER); + + regs->isp_rgn = *stream_ptr; + stream_ptr++; + + if (PVR_HAS_FEATURE(dev_info, gpu_multicore_support)) { + regs->frag_screen = *stream_ptr; + stream_ptr++; + } + + assert((const uint8_t *)stream_ptr - stream == stream_len); +} + static void pvr_srv_transfer_cmds_init( const struct pvr_winsys_transfer_submit_info *submit_info, struct rogue_fwif_cmd_transfer *cmds, - uint32_t cmd_count) + uint32_t cmd_count, + const struct pvr_device_info *const dev_info) { memset(cmds, 0, sizeof(*cmds) * submit_info->cmd_count); for (uint32_t i = 0; i < cmd_count; i++) { - struct rogue_fwif_transfer_regs *fw_regs = &cmds[i].regs; - - cmds[i].cmn.frame_num = submit_info->frame_num; - - fw_regs->isp_bgobjvals = submit_info->cmds[i].regs.isp_bgobjvals; - fw_regs->usc_pixel_output_ctrl = - submit_info->cmds[i].regs.usc_pixel_output_ctrl; - fw_regs->usc_clear_register0 = - submit_info->cmds[i].regs.usc_clear_register0; - fw_regs->usc_clear_register1 = - submit_info->cmds[i].regs.usc_clear_register1; - fw_regs->usc_clear_register2 = - submit_info->cmds[i].regs.usc_clear_register2; - fw_regs->usc_clear_register3 = - submit_info->cmds[i].regs.usc_clear_register3; - fw_regs->isp_mtile_size = submit_info->cmds[i].regs.isp_mtile_size; - fw_regs->isp_render_origin = submit_info->cmds[i].regs.isp_render_origin; - fw_regs->isp_ctl = submit_info->cmds[i].regs.isp_ctl; - fw_regs->isp_aa = submit_info->cmds[i].regs.isp_aa; - fw_regs->event_pixel_pds_info = - submit_info->cmds[i].regs.event_pixel_pds_info; - fw_regs->event_pixel_pds_code = - submit_info->cmds[i].regs.event_pixel_pds_code; - fw_regs->event_pixel_pds_data = - submit_info->cmds[i].regs.event_pixel_pds_data; - fw_regs->isp_render = submit_info->cmds[i].regs.isp_render; - fw_regs->isp_rgn = submit_info->cmds[i].regs.isp_rgn; - fw_regs->pds_bgnd0_base = submit_info->cmds[i].regs.pds_bgnd0_base; - fw_regs->pds_bgnd1_base = submit_info->cmds[i].regs.pds_bgnd1_base; - fw_regs->pds_bgnd3_sizeinfo = - submit_info->cmds[i].regs.pds_bgnd3_sizeinfo; - fw_regs->isp_mtile_base = submit_info->cmds[i].regs.isp_mtile_base; - - STATIC_ASSERT(ARRAY_SIZE(fw_regs->pbe_wordx_mrty) == - ARRAY_SIZE(submit_info->cmds[i].regs.pbe_wordx_mrty)); - for (uint32_t j = 0; j < ARRAY_SIZE(fw_regs->pbe_wordx_mrty); j++) { - fw_regs->pbe_wordx_mrty[j] = - submit_info->cmds[i].regs.pbe_wordx_mrty[j]; - } + const struct pvr_winsys_transfer_cmd *submit_cmd = &submit_info->cmds[i]; + struct rogue_fwif_cmd_transfer *cmd = &cmds[i]; + + cmd->cmn.frame_num = submit_info->frame_num; + + pvr_srv_transfer_cmd_stream_load(cmd, + submit_cmd->fw_stream, + submit_cmd->fw_stream_len, + dev_info); } } VkResult pvr_srv_winsys_transfer_submit( const struct pvr_winsys_transfer_ctx *ctx, const struct pvr_winsys_transfer_submit_info *submit_info, + const struct pvr_device_info *const dev_info, struct vk_sync *signal_sync) { const struct pvr_srv_winsys_transfer_ctx *srv_ctx = @@ -211,7 +263,8 @@ VkResult pvr_srv_winsys_transfer_submit( pvr_srv_transfer_cmds_init(submit_info, transfer_cmds, - submit_info->cmd_count); + submit_info->cmd_count, + dev_info); for (uint32_t i = 0U; i < submit_info->cmd_count; i++) { cmd_sizes[i] = sizeof(**cmds_ptr_arr); diff --git a/src/imagination/vulkan/winsys/pvrsrvkm/pvr_srv_job_transfer.h b/src/imagination/vulkan/winsys/pvrsrvkm/pvr_srv_job_transfer.h index acc4a14836a..86f548f99a7 100644 --- a/src/imagination/vulkan/winsys/pvrsrvkm/pvr_srv_job_transfer.h +++ b/src/imagination/vulkan/winsys/pvrsrvkm/pvr_srv_job_transfer.h @@ -26,6 +26,7 @@ #include <vulkan/vulkan.h> +struct pvr_device_info; struct pvr_winsys; struct pvr_winsys_transfer_ctx; struct pvr_winsys_transfer_ctx_create_info; @@ -45,6 +46,7 @@ void pvr_srv_winsys_transfer_ctx_destroy(struct pvr_winsys_transfer_ctx *ctx); VkResult pvr_srv_winsys_transfer_submit( const struct pvr_winsys_transfer_ctx *ctx, const struct pvr_winsys_transfer_submit_info *submit_info, + const struct pvr_device_info *dev_info, struct vk_sync *signal_sync); #endif /* PVR_SRV_JOB_TRANSFER_H */
