Module: Mesa Branch: main Commit: ee47cc8256d1154d37cfd89ed055128d34598770 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ee47cc8256d1154d37cfd89ed055128d34598770
Author: Georg Lehmann <[email protected]> Date: Tue Feb 21 14:06:46 2023 +0100 amd,nir: remove byte_permute_amd intrinsic It's unused and if we ever want to use it again we should make it an alu opcode instead. Reviewed-by: Timur Kristóf <[email protected]> Acked-by: Faith Ekstrand <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21445> --- src/amd/compiler/aco_instruction_selection.cpp | 9 --------- src/amd/compiler/aco_instruction_selection_setup.cpp | 1 - src/amd/llvm/ac_nir_to_llvm.c | 10 ---------- src/compiler/nir/nir_divergence_analysis.c | 1 - src/compiler/nir/nir_intrinsics.py | 2 -- 5 files changed, 23 deletions(-) diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp index 5b4e0931edc..1f4547d1433 100644 --- a/src/amd/compiler/aco_instruction_selection.cpp +++ b/src/amd/compiler/aco_instruction_selection.cpp @@ -8796,15 +8796,6 @@ visit_intrinsic(isel_context* ctx, nir_intrinsic_instr* instr) emit_wqm(bld, wqm_tmp, dst); break; } - case nir_intrinsic_byte_permute_amd: { - Temp dst = get_ssa_temp(ctx, &instr->dest.ssa); - assert(dst.regClass() == v1); - assert(ctx->program->gfx_level >= GFX8); - bld.vop3(aco_opcode::v_perm_b32, Definition(dst), get_ssa_temp(ctx, instr->src[0].ssa), - as_vgpr(ctx, get_ssa_temp(ctx, instr->src[1].ssa)), - as_vgpr(ctx, get_ssa_temp(ctx, instr->src[2].ssa))); - break; - } case nir_intrinsic_lane_permute_16_amd: { Temp src = get_ssa_temp(ctx, instr->src[0].ssa); Temp dst = get_ssa_temp(ctx, &instr->dest.ssa); diff --git a/src/amd/compiler/aco_instruction_selection_setup.cpp b/src/amd/compiler/aco_instruction_selection_setup.cpp index df4e0bd7c58..dfb53de7ed2 100644 --- a/src/amd/compiler/aco_instruction_selection_setup.cpp +++ b/src/amd/compiler/aco_instruction_selection_setup.cpp @@ -619,7 +619,6 @@ init_context(isel_context* ctx, nir_shader* shader) case nir_intrinsic_load_tess_coord: case nir_intrinsic_write_invocation_amd: case nir_intrinsic_mbcnt_amd: - case nir_intrinsic_byte_permute_amd: case nir_intrinsic_lane_permute_16_amd: case nir_intrinsic_load_instance_id: case nir_intrinsic_ssbo_atomic_add: diff --git a/src/amd/llvm/ac_nir_to_llvm.c b/src/amd/llvm/ac_nir_to_llvm.c index 63af9f5e77d..f330a357eb5 100644 --- a/src/amd/llvm/ac_nir_to_llvm.c +++ b/src/amd/llvm/ac_nir_to_llvm.c @@ -4168,16 +4168,6 @@ static bool visit_intrinsic(struct ac_nir_context *ctx, nir_intrinsic_instr *ins result = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, visit_first_invocation(ctx), ac_get_thread_id(&ctx->ac), ""); break; - case nir_intrinsic_byte_permute_amd: - if (LLVM_VERSION_MAJOR < 13) { - assert("unimplemented byte_permute, LLVM 12 doesn't have amdgcn.perm"); - break; - } - result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.perm", ctx->ac.i32, - (LLVMValueRef[]){get_src(ctx, instr->src[0]), - get_src(ctx, instr->src[1]), - get_src(ctx, instr->src[2])}, 3, 0); - break; case nir_intrinsic_lane_permute_16_amd: result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.permlane16", ctx->ac.i32, (LLVMValueRef[]){get_src(ctx, instr->src[0]), diff --git a/src/compiler/nir/nir_divergence_analysis.c b/src/compiler/nir/nir_divergence_analysis.c index cfb91c6212f..b932b6adac7 100644 --- a/src/compiler/nir/nir_divergence_analysis.c +++ b/src/compiler/nir/nir_divergence_analysis.c @@ -392,7 +392,6 @@ visit_intrinsic(nir_shader *shader, nir_intrinsic_instr *instr) case nir_intrinsic_quad_swap_horizontal: case nir_intrinsic_quad_swap_vertical: case nir_intrinsic_quad_swap_diagonal: - case nir_intrinsic_byte_permute_amd: case nir_intrinsic_load_deref: case nir_intrinsic_load_shared: case nir_intrinsic_load_shared2_amd: diff --git a/src/compiler/nir/nir_intrinsics.py b/src/compiler/nir/nir_intrinsics.py index 25cafc87253..e446d11a34c 100644 --- a/src/compiler/nir/nir_intrinsics.py +++ b/src/compiler/nir/nir_intrinsics.py @@ -465,8 +465,6 @@ intrinsic("write_invocation_amd", src_comp=[0, 0, 1], dest_comp=0, bit_sizes=src flags=[CAN_ELIMINATE]) # src = [ mask, addition ] intrinsic("mbcnt_amd", src_comp=[1, 1], dest_comp=1, bit_sizes=[32], flags=[CAN_ELIMINATE]) -# Compiled to v_perm_b32. src = [ in_bytes_hi, in_bytes_lo, selector ] -intrinsic("byte_permute_amd", src_comp=[1, 1, 1], dest_comp=1, bit_sizes=[32], flags=[CAN_ELIMINATE, CAN_REORDER]) # Compiled to v_permlane16_b32. src = [ value, lanesel_lo, lanesel_hi ] intrinsic("lane_permute_16_amd", src_comp=[1, 1, 1], dest_comp=1, bit_sizes=[32], flags=[CAN_ELIMINATE])
