Module: Mesa Branch: main Commit: d6d8edf9ae654293047b0d953516e1626ebedeb1 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d6d8edf9ae654293047b0d953516e1626ebedeb1
Author: Väinö Mäkelä <[email protected]> Date: Sat Nov 19 21:18:24 2022 +0200 hasvk: Handle subpass self-dependencies for stencil shadow copies Always copying when dstAccessMask includes texture operations is not optimal, but it's good enough. Reviewed-by: Lionel Landwerlin <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19876> --- src/intel/vulkan_hasvk/anv_blorp.c | 7 ++++++- src/intel/vulkan_hasvk/genX_cmd_buffer.c | 16 ++++++++++++++++ 2 files changed, 22 insertions(+), 1 deletion(-) diff --git a/src/intel/vulkan_hasvk/anv_blorp.c b/src/intel/vulkan_hasvk/anv_blorp.c index 8aa0476d13e..448f3bd574b 100644 --- a/src/intel/vulkan_hasvk/anv_blorp.c +++ b/src/intel/vulkan_hasvk/anv_blorp.c @@ -1486,7 +1486,12 @@ anv_image_copy_to_shadow(struct anv_cmd_buffer *cmd_buffer, uint32_t base_layer, uint32_t layer_count) { struct blorp_batch batch; - anv_blorp_batch_init(cmd_buffer, &batch, 0); + anv_blorp_batch_init(cmd_buffer, &batch, + /* If the sample count is set, we are in a render pass + * and don't want blorp to overwrite depth/stencil + * state + */ + cmd_buffer->state.gfx.samples ? BLORP_BATCH_NO_EMIT_DEPTH_STENCIL : 0); /* We don't know who touched the main surface last so flush a bunch of * caches to ensure we get good data. diff --git a/src/intel/vulkan_hasvk/genX_cmd_buffer.c b/src/intel/vulkan_hasvk/genX_cmd_buffer.c index 90068161375..37853f396de 100644 --- a/src/intel/vulkan_hasvk/genX_cmd_buffer.c +++ b/src/intel/vulkan_hasvk/genX_cmd_buffer.c @@ -1979,6 +1979,22 @@ cmd_buffer_barrier(struct anv_cmd_buffer *cmd_buffer, img_barrier->oldLayout, img_barrier->newLayout, false /* will_full_fast_clear */); + + /* If we are in a renderpass, the gfx7 stencil shadow may need to be + * updated even if the layout doesn't change + */ + if (cmd_buffer->state.gfx.samples && + (img_barrier->dstAccessMask & (VK_ACCESS_2_SHADER_READ_BIT | + VK_ACCESS_2_SHADER_SAMPLED_READ_BIT | + VK_ACCESS_2_INPUT_ATTACHMENT_READ_BIT))) { + const uint32_t plane = + anv_image_aspect_to_plane(image, VK_IMAGE_ASPECT_STENCIL_BIT); + if (anv_surface_is_valid(&image->planes[plane].shadow_surface)) + anv_image_copy_to_shadow(cmd_buffer, image, + VK_IMAGE_ASPECT_STENCIL_BIT, + range->baseMipLevel, level_count, + base_layer, layer_count); + } } if (range->aspectMask & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV) {
