Module: Mesa Branch: main Commit: 8058d31a25785f49f1e0aaed702d35c2c48e8a55 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8058d31a25785f49f1e0aaed702d35c2c48e8a55
Author: Alyssa Rosenzweig <[email protected]> Date: Sun Feb 12 20:19:41 2023 -0500 nir: Add nir_texop_lod_bias_agx Add a new texture opcode that returns the LOD bias of the sampler. This will be used on AGX to lower sampler LOD bias to txb and friends. This needs to be a texture op (and not a new intrinsic) to handle both bindless and bindful samplers across GL and Vulkan in a uniform way. Signed-off-by: Alyssa Rosenzweig <[email protected]> Acked-by: Faith Ekstrand <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21276> --- src/compiler/nir/nir.c | 2 ++ src/compiler/nir/nir.h | 1 + src/compiler/nir/nir_print.c | 3 +++ src/compiler/nir/nir_validate.c | 1 + src/compiler/spirv/spirv_to_nir.c | 3 +++ 5 files changed, 10 insertions(+) diff --git a/src/compiler/nir/nir.c b/src/compiler/nir/nir.c index c14469d83f8..83c7c627816 100644 --- a/src/compiler/nir/nir.c +++ b/src/compiler/nir/nir.c @@ -3239,6 +3239,7 @@ nir_tex_instr_result_size(const nir_tex_instr *instr) case nir_texop_query_levels: case nir_texop_samples_identical: case nir_texop_fragment_mask_fetch_amd: + case nir_texop_lod_bias_agx: return 1; case nir_texop_descriptor_amd: @@ -3265,6 +3266,7 @@ nir_tex_instr_is_query(const nir_tex_instr *instr) case nir_texop_query_levels: case nir_texop_descriptor_amd: case nir_texop_sampler_descriptor_amd: + case nir_texop_lod_bias_agx: return true; case nir_texop_tex: case nir_texop_txb: diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h index 8181f472a1a..621b8363cad 100644 --- a/src/compiler/nir/nir.h +++ b/src/compiler/nir/nir.h @@ -2200,6 +2200,7 @@ typedef enum { nir_texop_fragment_mask_fetch_amd, /**< Multisample fragment mask texture fetch */ nir_texop_descriptor_amd, /**< Returns a buffer or image descriptor. */ nir_texop_sampler_descriptor_amd, /**< Returns a sampler descriptor. */ + nir_texop_lod_bias_agx, /**< Returns the sampler's LOD bias */ } nir_texop; /** Represents a texture instruction */ diff --git a/src/compiler/nir/nir_print.c b/src/compiler/nir/nir_print.c index f63401be27d..c443fcc5828 100644 --- a/src/compiler/nir/nir_print.c +++ b/src/compiler/nir/nir_print.c @@ -1314,6 +1314,9 @@ print_tex_instr(nir_tex_instr *instr, print_state *state) case nir_texop_sampler_descriptor_amd: fprintf(fp, "sampler_descriptor_amd "); break; + case nir_texop_lod_bias_agx: + fprintf(fp, "lod_bias_agx "); + break; default: unreachable("Invalid texture operation"); break; diff --git a/src/compiler/nir/nir_validate.c b/src/compiler/nir/nir_validate.c index 82241c9f313..6d25151cba7 100644 --- a/src/compiler/nir/nir_validate.c +++ b/src/compiler/nir/nir_validate.c @@ -923,6 +923,7 @@ validate_tex_instr(nir_tex_instr *instr, validate_state *state) case nir_texop_sampler_descriptor_amd: break; case nir_texop_lod: + case nir_texop_lod_bias_agx: validate_assert(state, nir_alu_type_get_base_type(instr->dest_type) == nir_type_float); break; case nir_texop_samples_identical: diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to_nir.c index 78fbc5f4a70..9f6f341f5b2 100644 --- a/src/compiler/spirv/spirv_to_nir.c +++ b/src/compiler/spirv/spirv_to_nir.c @@ -2847,6 +2847,9 @@ vtn_handle_texture(struct vtn_builder *b, SpvOp opcode, case nir_texop_sampler_descriptor_amd: vtn_fail("unexpected nir_texop_*descriptor_amd"); break; + case nir_texop_lod_bias_agx: + vtn_fail("unexpected nir_texop_lod_bias_agx"); + break; } unsigned idx = 4;
