Module: Mesa Branch: main Commit: 8bb40ce4ad2418eaca9816c0facebc6e40204872 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8bb40ce4ad2418eaca9816c0facebc6e40204872
Author: Alyssa Rosenzweig <[email protected]> Date: Sat Mar 4 11:21:57 2023 -0500 agx: Fix 2D MSAA array texture register allocation Sample index and layer index are both 16-bits, even though they are zero extended for compiler simplicity in some cases. In particular this means that 2D MSAA arrays consume 6 half-regs for their coordinates, not 8. This is what the IR translation (actually agx_nir_lower_texture) produces, we just need to fix the calculation in agx_read_registers to agree. Fixes validation failure in tests like dEQP-GLES31.functional.texture.multisample.samples_4.use_texture_color_2d_array Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21708> --- src/asahi/compiler/agx_register_allocate.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/asahi/compiler/agx_register_allocate.c b/src/asahi/compiler/agx_register_allocate.c index dc124362e38..57483ba1809 100644 --- a/src/asahi/compiler/agx_register_allocate.c +++ b/src/asahi/compiler/agx_register_allocate.c @@ -119,7 +119,9 @@ agx_read_registers(agx_instr *I, unsigned s) case AGX_OPCODE_TEXTURE_LOAD: case AGX_OPCODE_TEXTURE_SAMPLE: if (s == 0) { - /* Coordinates. We internally handle sample index as 32-bit */ + /* Coordinates. We handle layer + sample index as 32-bit even when only + * the lower 16-bits are present. + */ switch (I->dim) { case AGX_DIM_1D: return 2 * 1; @@ -138,7 +140,7 @@ agx_read_registers(agx_instr *I, unsigned s) case AGX_DIM_CUBE_ARRAY: return 2 * 4; case AGX_DIM_2D_MS_ARRAY: - return 2 * 4; + return 2 * 3; } unreachable("Invalid texture dimension");
