Module: Mesa Branch: main Commit: 1c286db14e898d8dcba45969fdcb33ba070a5b80 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1c286db14e898d8dcba45969fdcb33ba070a5b80
Author: Samuel Pitoiset <[email protected]> Date: Thu Mar 9 17:28:28 2023 +0100 radv: zero-initialize radv_shader_info earlier for graphics pipeline This should allow us to remove a big memset when compiling a graphics pipeline. This is mostly for imported NIR stages which don't go through radv_pipeline_stage_init(). Signed-off-by: Samuel Pitoiset <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20947> --- src/amd/vulkan/radv_pipeline.c | 5 ++++- src/amd/vulkan/radv_shader_info.c | 2 ++ 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 0ba22678721..64431f591ef 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -2541,7 +2541,6 @@ radv_fill_shader_info(struct radv_graphics_pipeline *pipeline, bool consider_force_vrs = radv_consider_force_vrs(pipeline, noop_fs, stages); radv_foreach_stage(i, active_nir_stages) { - radv_nir_shader_info_init(&stages[i].info); radv_nir_shader_info_pass(device, stages[i].nir, pipeline_layout, pipeline_key, pipeline->base.type, i == pipeline->last_vgt_api_stage && consider_force_vrs, @@ -3554,6 +3553,10 @@ radv_graphics_pipeline_compile(struct radv_graphics_pipeline *pipeline, bool optimize_conservatively = pipeline_key->optimisations_disabled; + radv_foreach_stage(i, active_nir_stages) { + radv_nir_shader_info_init(&stages[i].info); + } + /* Determine if shaders uses NGG before linking because it's needed for some NIR pass. */ radv_fill_shader_info_ngg(pipeline, pipeline_key, stages); diff --git a/src/amd/vulkan/radv_shader_info.c b/src/amd/vulkan/radv_shader_info.c index d34eb9a5fe5..4d4d20f0d95 100644 --- a/src/amd/vulkan/radv_shader_info.c +++ b/src/amd/vulkan/radv_shader_info.c @@ -690,6 +690,8 @@ gather_shader_info_task(const nir_shader *nir, struct radv_shader_info *info) void radv_nir_shader_info_init(struct radv_shader_info *info) { + memset(info, 0, sizeof(*info)); + /* Assume that shaders can inline all push constants by default. */ info->can_inline_all_push_constants = true; }
