Module: Mesa Branch: main Commit: 14f9f98dcb4b6034c331120acf405e9a3c64edc6 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=14f9f98dcb4b6034c331120acf405e9a3c64edc6
Author: Kenneth Graunke <[email protected]> Date: Thu Mar 16 16:01:16 2023 -0700 i965/vec4: Implement uclz in the vec4 backend Commit 28311f9d029 moved ufind_msb lowering to NIR and started emitting uclz. Unfortunately, the vec4 backend never actually implemented uclz. It's trivial to do. Now it does. Fixes: 28311f9d029 ("nir: intel/compiler: Move ufind_msb lowering to NIR") Reviewed-by: Faith Ekstrand <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21974> --- src/intel/compiler/brw_vec4.h | 1 + src/intel/compiler/brw_vec4_nir.cpp | 6 ++++++ src/intel/compiler/brw_vec4_visitor.cpp | 1 + 3 files changed, 8 insertions(+) diff --git a/src/intel/compiler/brw_vec4.h b/src/intel/compiler/brw_vec4.h index 12e58fd9bba..1b568176b19 100644 --- a/src/intel/compiler/brw_vec4.h +++ b/src/intel/compiler/brw_vec4.h @@ -214,6 +214,7 @@ public: EMIT1(FBH) EMIT1(FBL) EMIT1(CBIT) + EMIT1(LZD) EMIT3(MAD) EMIT2(ADDC) EMIT2(SUBB) diff --git a/src/intel/compiler/brw_vec4_nir.cpp b/src/intel/compiler/brw_vec4_nir.cpp index 32b0a3af5d5..c94331f3126 100644 --- a/src/intel/compiler/brw_vec4_nir.cpp +++ b/src/intel/compiler/brw_vec4_nir.cpp @@ -1636,6 +1636,12 @@ vec4_visitor::nir_emit_alu(nir_alu_instr *instr) break; } + case nir_op_uclz: + assert(nir_dest_bit_size(instr->dest.dest) == 32); + assert(nir_src_bit_size(instr->src[0].src) == 32); + emit(LZD(dst, op[0])); + break; + case nir_op_find_lsb: assert(nir_dest_bit_size(instr->dest.dest) == 32); assert(nir_src_bit_size(instr->src[0].src) == 32); diff --git a/src/intel/compiler/brw_vec4_visitor.cpp b/src/intel/compiler/brw_vec4_visitor.cpp index f205baa7847..82076cd1c8a 100644 --- a/src/intel/compiler/brw_vec4_visitor.cpp +++ b/src/intel/compiler/brw_vec4_visitor.cpp @@ -183,6 +183,7 @@ ALU3(BFI2) ALU1(FBH) ALU1(FBL) ALU1(CBIT) +ALU1(LZD) ALU3(MAD) ALU2_ACC(ADDC) ALU2_ACC(SUBB)
