Module: Mesa Branch: main Commit: d07c81d87eef24217f6d4420da907870741a734d URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d07c81d87eef24217f6d4420da907870741a734d
Author: Samuel Pitoiset <[email protected]> Date: Tue Mar 21 11:13:41 2023 +0100 radv: move cs_regalloc_hang_bug to radv_shader_info This is more like a shader property. Signed-off-by: Samuel Pitoiset <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22102> --- src/amd/vulkan/radv_cmd_buffer.c | 5 +++-- src/amd/vulkan/radv_pipeline.c | 7 ------- src/amd/vulkan/radv_private.h | 2 -- src/amd/vulkan/radv_shader.h | 2 ++ src/amd/vulkan/radv_shader_info.c | 5 +++++ 5 files changed, 10 insertions(+), 11 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 9f68afa4065..5c624e86943 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -9763,10 +9763,11 @@ static void radv_dispatch(struct radv_cmd_buffer *cmd_buffer, const struct radv_dispatch_info *info, struct radv_compute_pipeline *pipeline, VkPipelineBindPoint bind_point) { + struct radv_shader *compute_shader = pipeline->base.shaders[MESA_SHADER_COMPUTE]; bool has_prefetch = cmd_buffer->device->physical_device->rad_info.gfx_level >= GFX7; bool pipeline_is_dirty = pipeline != cmd_buffer->state.emitted_compute_pipeline; - if (pipeline->cs_regalloc_hang_bug) + if (compute_shader->info.cs.regalloc_hang_bug) cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_PS_PARTIAL_FLUSH | RADV_CMD_FLAG_CS_PARTIAL_FLUSH; @@ -9825,7 +9826,7 @@ radv_dispatch(struct radv_cmd_buffer *cmd_buffer, const struct radv_dispatch_inf : VK_PIPELINE_BIND_POINT_COMPUTE); } - if (pipeline->cs_regalloc_hang_bug) + if (compute_shader->info.cs.regalloc_hang_bug) cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_CS_PARTIAL_FLUSH; radv_cmd_buffer_after_draw(cmd_buffer, RADV_CMD_FLAG_CS_PARTIAL_FLUSH); diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index c2306e5ba3a..63ca69241c6 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -5303,13 +5303,6 @@ radv_compute_pipeline_init(struct radv_compute_pipeline *pipeline, pipeline->base.shader_upload_seq = pipeline->base.shaders[MESA_SHADER_COMPUTE]->upload_seq; - if (device->physical_device->rad_info.has_cs_regalloc_hang_bug) { - struct radv_shader *compute_shader = pipeline->base.shaders[MESA_SHADER_COMPUTE]; - unsigned *cs_block_size = compute_shader->info.cs.block_size; - - pipeline->cs_regalloc_hang_bug = cs_block_size[0] * cs_block_size[1] * cs_block_size[2] > 256; - } - radv_compute_generate_pm4(pipeline); } diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h index 92982403449..6c484db9d74 100644 --- a/src/amd/vulkan/radv_private.h +++ b/src/amd/vulkan/radv_private.h @@ -2275,8 +2275,6 @@ struct radv_graphics_pipeline { struct radv_compute_pipeline { struct radv_pipeline base; - - bool cs_regalloc_hang_bug; }; struct radv_ray_tracing_module { diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h index 46ac486f5a0..1168f1057b4 100644 --- a/src/amd/vulkan/radv_shader.h +++ b/src/amd/vulkan/radv_shader.h @@ -367,6 +367,8 @@ struct radv_shader_info { bool uses_dynamic_rt_callable_stack; bool uses_rt; bool uses_full_subgroups; + + bool regalloc_hang_bug; } cs; struct { uint64_t tes_inputs_read; diff --git a/src/amd/vulkan/radv_shader_info.c b/src/amd/vulkan/radv_shader_info.c index bcc6701369b..a7c28e253c6 100644 --- a/src/amd/vulkan/radv_shader_info.c +++ b/src/amd/vulkan/radv_shader_info.c @@ -697,6 +697,11 @@ gather_shader_info_cs(struct radv_device *device, const nir_shader *nir, } info->cs.subgroup_size = subgroup_size; + + if (device->physical_device->rad_info.has_cs_regalloc_hang_bug) { + info->cs.regalloc_hang_bug = + info->cs.block_size[0] * info->cs.block_size[1] * info->cs.block_size[2] > 256; + } } static void
